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复旦大学
Published:1982
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[1]庄震武,阮根鸿.数字电路六值定时分析模型[J].电子学报,1982(02):32-38.
Zhuang Zhen-wu, Ruan Ken-hong. A Six-Valued Model for Timing Analysis of Logical Circuits[J]. Acta Electronica Sinica, 1982, (2): 32-38.
本文以六值逻辑为基础
建立了实际讯号波形与合法相容的转换序列之间的一一对应关系
以值操作、延迟操作及时间操作来模型化一个门的功能
以输入序列经过三种操作后得到的输出序列来模拟电路对输入讯号的响应。应用本文所提出的定时分析模型研制的LOCAS模拟器的定时模拟程序已在PDP-11/34计算机上调试通过。对文中列举的二个电路例子应用计算机模拟得到了较满意的结果
并通过对比阐述了六值定时模拟的优越性。
The timing simulation
which can describe the logical behaviors as well as the time relation between the behaviors occurring in the circuit
is an efficient approach to analyse logical circuits. There are some troubles in timing analysis by using two-valued and three-valued systems due to their own restrictions. A model on the basis of six-valued logic system for timing analysis is presented in this paper. The model and the simulation algorithm are detailed and the comparison between the six-valued model and other models in timing simulation are given. The response of the system is obtained by means of the time matched simulation algorithm. The program for six-valued timing simulation written in FORTRAN-4 which is developed as an important part in LOCAS system has been executed on PDP-11/34 computer
and the results for some sample circuits are found satisfactory.
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