Design and Implementation of SJ-MSD Adder in Ternary Optical Computer

JIANG Jia-bao; ZHANG Xiao-feng; SHEN Yun-fu; OUYANG Shan; ZHOU Shi-qiang; PENG Jun-jie; LIU Yue-jun; JIN Yi

doi:10.12263/DZXB.20180572

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Design and Implementation of SJ-MSD Adder in Ternary Optical Computer

更新时间：2025-12-08

- Design and Implementation of SJ-MSD Adder in Ternary Optical Computer
- Acta Electronica Sinica Vol. 49, Issue 2, Pages: 275-285(2021)
- 作者机构：
  
  1. 上海大学计算机科学与工程学院,上海,200444
  2. 巢湖学院信息工程学院, 安徽巢湖,238000
  3. 中国航天科学与工业集团第25 研究所毫米波遥感技术国家重点实验室,北京,100039
  4. 上海大学计算机科学与工程学院,上海,200444
  5. 巢湖学院信息工程学院安徽巢湖,238000
  6. 中国航天科学与工业集团第25 研究所毫米波遥感技术国家重点实验室,北京,100039
- 作者简介：
- 基金信息：
  
  Natural Science Foundation of Education Department of Anhui Province (No.KJ2017A452);Special Fund for Research Project of Shanghai Municipality (No.15700500400);National Natural Science Foundation of China (No.61572305, No.61073049)
- DOI：10.12263/DZXB.20180572
  CLC： TP393
- Published Online：25 February 2021，
  
  Published：2021
- 稿件说明：
移动端阅览
JIANG Jia-bao, ZHANG Xiao-feng, SHEN Yun-fu, et al. Design and Implementation of SJ-MSD Adder in Ternary Optical Computer[J]. Acta Electronica Sinica, 2021, 49(2): 275-285.
DOI：

JIANG Jia-bao, ZHANG Xiao-feng, SHEN Yun-fu, et al. Design and Implementation of SJ-MSD Adder in Ternary Optical Computer[J]. Acta Electronica Sinica, 2021, 49(2): 275-285. DOI： 10.12263/DZXB.20180572.

摘要

本文介绍三值光学计算机的一种新型并行加法器—SJ-MSD加法器的设计与实现.介绍判断一组三值逻辑变换能够实现并行无连续进位二进制MSD数加法的充分条件（沈氏充分性定理）.给出了构成SJ-MSD加法器的五个三值逻辑变换：S

、S

、J

和J

（简称SJ变换），及其操作规则（简称SJ规则），并依据沈氏充分性定理推证了SJ变换和SJ规则构成MSD并行加法器的可靠性.尔后又详细阐述了SJ-MSD加法器在三值光学计算机原型系统SD16上的设计方案和实现方法，并阐述了流水计算和多数据共享SJ-MSD加法器的实现方法.文中最后详细介绍了对SJ-MSD加法器的测试实验.与先期的TW-MSD加法器相比，SJ-MSD加法器减少占用处理器位数约25%，有效提高了三值光学处理器的使用率.

Abstract

In this paper the design and implementation of a new parallel adder

SJ-MSD adder

in a ternary optical computer (i.e.TOC) are proposed. It is introduced that a sufficient conditions (Shen's sufficient theorem) which judging that a group of ternary logical transformations is able to build a MSD (Modified Signed Digit) addition. Five logical transformations S

and J

(i.e.SJ transformation) and a parallel carry-free MSD addition rule (i.e.SJ rule) are proposed to construct SJ-MSD adder. Meanwhile according to Shen's sufficient theorem

the reliability of the SJ transform

ation and SJ rule used to construct MSD parallel adder is proved. Subsequently

in the ternary optical computer prototype system SD16

the design and implement of SJ-MSD adder are discussed in detail. At the same time the implementation methods of pipeline addition and sharing one SJ-MSD adder for multiple data are expatiated. Some experiments of SJ-MSD adder is introduced. Compared with the previous TW-MSD adder

the SJ-MSD adder occupies processor bits less about 25%. So the optical processor’ efficiency is effectively improved.

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