Design of Ethernet Clock Synchronization Method Based on DP83640

SUN Jian-peng; LIU Xin; HONG Ying-ping; HE Xin; XIONG Ji-jun

doi:10.12263/DZXB.20200962

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Design of Ethernet Clock Synchronization Method Based on DP83640

更新时间：2025-12-08

- Design of Ethernet Clock Synchronization Method Based on DP83640
- Acta Electronica Sinica Vol. 49, Issue 5, Pages: 1033-1040(2021)
- 作者机构：
  
  1. 中北大学仪器科学与动态测试教育部重点实验室,山西,太原,030051
  2. 北方自动控制技术研究所,山西,太原,030006
  3. 中北大学仪器科学与动态测试教育部重点实验室,山西,太原,030051
  4. 北方自动控制技术研究所,山西,太原,030006
- 作者简介：
- 基金信息：
  
  Youth Fund of National Natural Science Foundation of China (No.51705475)
- DOI：10.12263/DZXB.20200962
  CLC： TP393
- Published：2021
- 稿件说明：
移动端阅览
SUN Jian-peng, LIU Xin, HONG Ying-ping, et al. Design of Ethernet Clock Synchronization Method Based on DP83640[J]. Acta Electronica Sinica, 2021, 49(5): 1033-1040.
DOI：

SUN Jian-peng, LIU Xin, HONG Ying-ping, et al. Design of Ethernet Clock Synchronization Method Based on DP83640[J]. Acta Electronica Sinica, 2021, 49(5): 1033-1040. DOI： 10.12263/DZXB.20200962.

摘要

针对当下以太网在军事、工业等领域中的定时同步能力不足

精度不高的问题

设计一种高精度时钟同步协议的高可信的时钟同步接口电路.目前主流的精度最高的是IEEE1588精确时钟同步协议;深入研究分析IEEE1588协议的最佳主时钟算法和主从时钟同步原理

提出了基于DP83640的以太网时钟同步方法

提供了一种在物理层加盖时间戳在以太网中实现高精度时钟同步的方案

阐述主从时钟软件对时流程

对主从时钟同步精度进行测试验证

可达到亚微秒级的时钟同步精度.

Abstract

Aiming at the problem of insufficient timing synchronization capability and low accuracy of Ethernet in the military

industrial and other fields at present

a highly reliable clock synchronization interface circuit with a high-precision clock synchronization protocol is designed. The current mainstream with the highest precision is the IEEE1588 precision clock synchronization protocol; In-depth study and analysis of the best master clock algorithm and master-slave clock synchronization principle of the IEEE1588 protocol

proposed an ethernet clock synchronization method based on DP83640

provides a solution for stamping time stamps at the physical layer to achieve high-precision clock synchronization in ethernet

explain the master-slave clock software time synchronization process

test and verify the synchronization accuracy of master-slave clocks

which can achieve sub-microsecond clock synchronization accuracy.

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