Design and Implementation of a Fast Set-Up and Low-Noise Bandgap Reference

WU Xi-an; ZHANG Ze-chen; YUAN Sheng-yue; TIAN Tong

doi:10.12263/DZXB.20201143

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Design and Implementation of a Fast Set-Up and Low-Noise Bandgap Reference

PAPERS | 更新时间：2025-12-08

- Design and Implementation of a Fast Set-Up and Low-Noise Bandgap Reference
- ACTA ELECTRONICA SINICA Vol. 49, Issue 11, Pages: 2195-2201(2021)
- 作者机构：
  
  1.中国科学院上海微系统与信息技术研究所，上海200050
  2.中国科学院大学，北京100049
  3.上海科技大学信息科学与技术学院，上海201210
- 作者简介：
- 基金信息：
- DOI：10.12263/DZXB.20201143
  CLC： TN43
- Received：16 October 2020，
  
  Revised：2021-07-07，
  
  Published：25 November 2021
- 稿件说明：
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伍锡安,章泽臣,袁圣越等.一种快速建立的低噪声带隙基准源设计与实现[J].电子学报,2021,49(11):2195-2201.

WU Xi-an,ZHANG Ze-chen,YUAN Sheng-yue,et al.Design and Implementation of a Fast Set-Up and Low-Noise Bandgap Reference[J].ACTA ELECTRONICA SINICA,2021,49(11):2195-2201.
伍锡安,章泽臣,袁圣越等.一种快速建立的低噪声带隙基准源设计与实现[J].电子学报,2021,49(11):2195-2201. DOI： 10.12263/DZXB.20201143.

WU Xi-an,ZHANG Ze-chen,YUAN Sheng-yue,et al.Design and Implementation of a Fast Set-Up and Low-Noise Bandgap Reference[J].ACTA ELECTRONICA SINICA,2021,49(11):2195-2201. DOI： 10.12263/DZXB.20201143.

摘要

基于UMC 65nm CMOS工艺设计实现了一种快速建立的低噪声带隙基准源.利用工作在深线性区的MOS管实现了GΩ级别大电阻，因此仅采用5pF的电容即实现了截止频率低至32Hz的带开关低通滤波器，有效降低了带隙基准源输出噪声.有源器件的采用大大节省了芯片面积，降低了制作成本.通过采用上电延时电路去控制低通滤波器工作状态，克服了采用大阻值电阻或大容值电容低通滤波器降噪面临的缓慢建立问题，实现了快速建立.通过Spectre仿真器对电路在1.8V电源电压下进行了仿真，后仿真结果表明，电路在10kHz、100kHz、1MHz的输出噪声分别为：11.76nV/sqrtHz、1.213 nV/sqrtHz、336.8 pV/sqrtHz，电路的建立时间为1.436μs，整体功耗为104.4μW.本文设计已在实际芯片中得到应用，并取得了预期效果.

Abstract

A fast set-up and low-noise bandgap reference is designed and implemented with UMC 65nm COMS process. A GΩ level resistor is realized by using a MOS transistor working in deep triode region. Therefore

only a 5pF capacitor is used to realize a switching low-pass filter with a cut-off frequency as low as 32Hz

which effectively reduces the output noise of the bandgap reference. The use of active devices greatly saves chip area and reduces manufacturing costs. A power-on delay circuit is adopted to control the working state of the low-pass filter

which overcomes the problem of slow set-up by using low-pass filters with large resistance or large capacitance capacitors to reduce noise and achieve rapid set-up. The circuit is simulated under 1.8V supply voltage by spectre simulator. The post simulation results show that the output noise of the circuit at 10kHz

100kHz

and 1MHz are 11.76nV/sqrtHz

1.213 nV/sqrtHz

336.8 pV/sqrtHz

respectively. The settling time of the circuit is 1.436μs

and the power consumption is 104.4μW.This design has been applied to the actual chips and achieved the expected effect.

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references

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