Study on Single Event Effect Evaluation Method Based on Xilinx FPGA System

WANG Peng; ZOU Bin; LIU Jin-zhi; ZHOU Dan-yang

doi:10.12263/DZXB.20211362

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Study on Single Event Effect Evaluation Method Based on Xilinx FPGA System

PAPERS | 更新时间：2025-12-08

- Study on Single Event Effect Evaluation Method Based on Xilinx FPGA System
- ACTA ELECTRONICA SINICA Vol. 50, Issue 11, Pages: 2716-2721(2022)
- 作者机构：
  
  1.中国民航大学安全科学与工程学院, 天津 300300
  2.中国民航大学民航航空器适航审定技术重点实验室,天津 300300
  3.中国民航大学电子信息与自动化学院,天津 300300
- 作者简介：
- 基金信息：
- DOI：10.12263/DZXB.20211362
  CLC： TN406
- Received：09 October 2021，
  
  Revised：2022-03-06，
  
  Published：25 November 2022
- 稿件说明：
移动端阅览
王鹏,邹彬,刘金枝等.基于Xilinx型FPGA系统单粒子效应评估方法研究[J].电子学报,2022,50(11):2716-2721.

WANG Peng,ZOU Bin,LIU Jin-zhi,et al.Study on Single Event Effect Evaluation Method Based on Xilinx FPGA System[J].ACTA ELECTRONICA SINICA,2022,50(11):2716-2721.
王鹏,邹彬,刘金枝等.基于Xilinx型FPGA系统单粒子效应评估方法研究[J].电子学报,2022,50(11):2716-2721. DOI： 10.12263/DZXB.20211362.

WANG Peng,ZOU Bin,LIU Jin-zhi,et al.Study on Single Event Effect Evaluation Method Based on Xilinx FPGA System[J].ACTA ELECTRONICA SINICA,2022,50(11):2716-2721. DOI： 10.12263/DZXB.20211362.

摘要

Virtex-5系列芯片没有官方提供的专用软错误缓解（Soft Error Mitigation，SEM）IP核，需自行设计故障注入系统.本文选用XC5VFX130T型现场可编程门阵列（Field Programmable Gate Array，FPGA）芯片利用单帧部分重构功能达到等同于SEM IP故障注入效果，实现对FPGA电路系统的抗单粒子翻转能力评估测试.利用逐位注入故障模式对XC5VFX130T型FPGA的配置位逐个注入故障，获得待评估电路的敏感配置位信息；对待测电路进行三模冗余防护加固，利用累积故障注入模式连续随机注入模拟单粒子辐照试验环境，得到待评估电路的功能中断截面，进而实现对基于XC5VFX130T型FPGA系统的抗单粒子翻转加固效果的评估.研究表明，基准电路（移位寄存器链等）评估得到的功能中断截面与实际辐照试验中的功能中断截面曲线变化一致，为机载电子的单粒子效应适航评估提供了支持.

Abstract

The Virtex-5 series chips do not have an official soft error mitigation(SEM) IP core

so they need to design their own fault injection system.The XC5VFX130T field programmable gate array(FPGA) chip is selected to achieve the effect equivalent to SEM IP fault injection with the single-frame partial reconstruction function

and the single-event upset resistance of FPGA circuit system is evaluated and tested.The configuration bits of XC5VFX130T FPGA are injected one by one in bitwise injection fault mode to obtain the sensitive configuration bit information of the circuit to be evaluated.The test circuit was reinforced with three-mode redundancy protection

and the cumulative fault injection mode was used to simulate the single-particle irradiation test environment. The functional interruption section of the circuit to be evaluated was obtained

and then the anti-single-event upset reinforcement effect of XC5VFX130T FPGA system was evaluated.The study shows that the function interruption cross section of reference circuit such as shift register chain is consistent with the change of function interruption cross section curve of actual irradiation test

which provides support for the airworthiness evaluation of airborne electron with single event effect.

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references

ALDERIGHI M , MANCINI M , et al . A fault injection tool for SRAM-based FPGAs [C]//ANGELO S. 9th IEEE On-Line Testing Symposium . Kos : IEEE , 2016 : 129 - 133 .

方金木 . 航天应用FPGA可靠性设计技术研究 [D]. 西安 : 西安电子科技大学 , 2014 .

王鹏 , 芦浩 , 刘金枝 , 薛茜男 , 金志威 . 基于协同进化的航空高度单粒子翻转故障生成方法研究 [J]. 现代电子技术 , 2019 , 42 ( 16 ): 112 - 116, 121 .

张伟 . 脉冲激光模拟半导体分立器件单粒子效应的实验研究 [D]. 哈尔滨 : 哈尔滨工业大学 , 2013 .

GIL P J , BLANC S . A fault hypothesis study on the TTP/C using VHDL-based and pin-level fault injection techniques [C]//BLANC S. 17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems . Vancouver : IEEE , 2003 : 63 - 79 .

ARLAT J , COSTES A , CROUZET Y , et al . Fault injection and dependability evaluation of fault-tolerant systems [J]. Computers IEEE Transactions on , 1993 , 42 ( 8 ): 913 - 923 .

BALDINII A , BENSO A , PRINETTO P . "Bond": An agents-based fault injector for windows NT [C]//CHIUSANO S. Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems . Yamanashi, Japan : IEEE , 2003 : 111 - 123 .

杨道宁 . SRAM型FPGA单粒子效应故障注入测试方法关键技术研究 [D]. 长沙 : 国防科学技术大学 , 2013 .

王梦茹 , 周珊 , 薛盼盼 , 孔璐 , 王金波 . 基于SEM IP和部分重配置的SRAM型FPGA单粒子故障注入 [J]. 微电子学与计算机 , 2021 , 38 ( 08 ): 8 - 12 .

陈志辉 , 章淳 , 王颖 , 王伶俐 . 一种FPGA抗辐射工艺映射方法研究 [J]. 电子学报 , 2011 , 39 ( 11 ): 2507 - 2512 .

CHEN Zhi-hui , ZHANG Chun , WANG Ying , WANG Ling-li . An FPGA robust technology mapping method [J]. Acta Electronica Sinica , 2011 , 39 ( 11 ): 2507 - 2512 . (in Chinese)

王晶 , 荣金叶 , 周继芹 , 于航 , 申娇 , 张伟功 . 软硬件协同设计的SEU故障注入技术研究 [J]. 电子学报 , 2018 , 46 ( 10 ): 2534 - 2538 .

WANG Jing , RONG Jin‑ye , ZHOU Ji‑qin , YU Hang , SHEN Jiao , ZHANG Wei‑gong . The research on softwarehardware co‑designed SEU fault‑injection technology [J]. Acta Electronica Sinica , 2018 , 46 ( 10 ): 2534 ‑ 2538 . (in Chinese)

JENN E , ARLAT J , RIMEN M , et al . Fault injection into VHDL models: the MEFISTO tool [C]//KARLSSON J. Proceedings of IEEE 24th International Symposium on Fault-Tolerant Computing . Austin, Texas : IEEE , 1994 : 66 - 75 .

Xilinx发布65nm Virtex-5系列FPGA [J]. 电子产品世界 , 2006 , 12 : 61 - 62 .

高丽丽 . 基于Xilinx V5的SAR-GMTI若干关键技术的实现 [D]. 西安 : 西安电子科技大学 , 2012 .

张皓 , 裴玉奎 . SRAM型FPGA中SEM IP核的验证与自动注错方法 [J]. 半导体技术 , 2017 , 42 ( 03 ): 223 - 228, 240 .

JOHNSON E , CAFFERY M , GRAHAM P , et al . Accelerator validation of an FPGA SEU simulator [J]. IEEE Transactions on Nuclear Science , 2015 , 50 ( 6 ): 2147 - 2157 .

Xilinx , Inc . Virtex-5 FPGA configuration user guide [EB/OL].( 2020-07-28 )[ 2021-9-07 ]. https://china.xilinx.com/content/dam/xilinx/support/documentation/user_guides/ug191.pdf https://china.xilinx.com/content/dam/xilinx/support/documentation/user_guides/ug191.pdf .

支天 , 杨海钢 , 蔡刚 , 秋小强 , 李天文 , 王新刚 . 嵌入式存储器空间单粒子效应失效率评估方法研究 [J]. 电子与信息学报 , 2014 , 36 ( 12 ): 3035 - 3041 .

吴圣陶 . SRAM型FPGA单粒子翻转效应的故障注入系统研究 [D]. 西安 : 西安电子科技大学 , 2011 : 7 - 8 .

宋凝芳 , 秦姣梅 , 潘雄 , 江云天 . SRAM型FPGA单粒子效应逐位翻转故障注入方法 [J]. 北京航空航天大学学报 , 2012 , 38 ( 10 ): 1285 - 1289 .

BENTOUTOU Y . A real time EDAC system for applications onboard earth observation small satellites [J]. IEEE Transactions on Aerospace and Electronic Systems , 2012 , 48 ( 1 ): 648 - 657 .

ZHANG R , XIAO L , LI J , et al . A fault injection platform supporting both SEU and multiple SEUs for SRAM-Based FPGA [J]. IEEE Transactions on Device and Materials Reliability , 2018 , 18 ( 4 ): 599 - 605 .

黄建国 , 韩建伟 , 林云龙 , 黄治 , 路秀琴 , 张新 , 符长波 . 一种SEU实验数据的处理方法 [J]. 空间科学学报 , 2002 , 22 ( 03 ): 268 - 274 .

MURTHY D N P , BULMER M , ECCLESTON J A . Weibull model selection for reliability modeling [J]. Reliability Engineering& System Safety , 2004 , 86 ( 3 ): 257 - 267 .

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