A high SNR Improvement Analog TDI Image Sensor With Charge Compensation Technique

GUO Zhong-jie; LI Chen; XU Rui-ming; CHEN Xin-qi; YU Ning-mei; SU Chang-xu

doi:10.12263/DZXB.20220832

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A high SNR Improvement Analog TDI Image Sensor With Charge Compensation Technique

更新时间：2024-02-23

- A high SNR Improvement Analog TDI Image Sensor With Charge Compensation Technique
- ACTA ELECTRONICA SINICA Pages: 1-9(2024)
- 作者机构：
  
  西安理工大学自动化与信息工程学院，陕西西安 710048
- 作者简介：
- 基金信息：
- DOI：10.12263/DZXB.20220832
  CLC： TN47;
- Received：15 July 2022，
  
  Revised：2022-12-06，
  
  Published Online：23 February 2024，
- 稿件说明：
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郭仲杰，李晨，许睿明，等. 基于电荷补偿型的高SNR模拟域TDI图像传感器［J］. 电子学报，XXXX，XX（XX）：1-9. DOI：10.12263/DZXB.20220832

GUO Zhong-jie, LI Chen, XU Rui-ming, et al. A high SNR Improvement Analog TDI Image Sensor With Charge Compensation Technique[J]. Acta Electronica Sinica, XXXX, XX(XX): 1-9.
郭仲杰，李晨，许睿明，等. 基于电荷补偿型的高SNR模拟域TDI图像传感器［J］. 电子学报，XXXX，XX（XX）：1-9. DOI：10.12263/DZXB.20220832 DOI：

GUO Zhong-jie, LI Chen, XU Rui-ming, et al. A high SNR Improvement Analog TDI Image Sensor With Charge Compensation Technique[J]. Acta Electronica Sinica, XXXX, XX(XX): 1-9. DOI：10.12263/DZXB.20220832

摘要

针对传统模拟域时间延迟积分（Time Delay Integration，TDI）CMOS（Complementary Metal Oxide Semiconductor）图像传感器累加过程中的寄生影响问题，本文提出了一种高精度模拟域高级数CMOS-TDI图像传感器设计方案.该方案基于电荷自适应补偿的思想，对累加过程中采样相位与保持相位的寄生效应损失电荷分别进行补偿，解决了模拟域CMOS-TDI图像传感器高级数累加精度低的问题；同时基于热噪声KT/C消除技术，将原有的累加器电路噪声降低1/2，进而降低了累加器中采样电容与保持电容的容值需求.本文基于55 nm CMOS工艺实现了最大128级累加，7.75 kHz行频的模拟域CMOS-TDI图像传感器.基于寄生效应的影响机理，本文所提电路通过对存储电容顶上极板与下极板交替充电，实现差分输出值翻转，同时配合正反馈电容，动态补偿采样阶段和保持阶段的电荷损失.128级累加的SNR（Signal-to-Noise Ratio）可以提高20.9 dB.

Abstract

Aiming at the problem of parasitic effects in the accumulation process of traditional analog domain time delay integration (TDI) CMOS (Complementary Metal Oxide Semiconductor) image sensors

this paper proposes a high-precision analog domain advanced digital CMOS-TDI image sensor design scheme. Based on the idea of charge adaptive compensation

the scheme compensates the parasitic charge loss of the sampling phase and the holding phase during the accumulation process

which solves the problem of low accumulation accuracy of advanced digital in the analog domain CMOS-TDI image sensor. At the same time

based on the thermal noise KT/C elimination technology

the scheme reduces the noise of the accumulator circuit by 1/2

there by reducing the capacitance requirements of the sampling capacitor and the holding capacitor in the accumulator. In this paper

an analog domain CMOS-TDI image sensor with a maximum 128-stage accumulation and a line frequency of 7.75 kHz is realized based on the 55 nm CMOS process. Based on the influence mechanism of the parasitic effect

the proposed circuit realizes the inversion of the differential output value by alternately charging the top plate and the bottom plate of the storage capacitor to

and at the same time

cooperates with the positive feedback capacitor to dynamically compensate the charge loss in the sampling phase and the holding phase. The SNR (Signal-to-Noise Ratio) of 128 stage of accumulation can be improved by up to 20.9 dB.

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references

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