Amdahl’s Law-Based Energy-Efficient Model for Heterogeneous Multicore Crypto-Processor

LI Wei; LANG Jun-hao; CHEN Tao; NAN Long-mei

doi:10.12263/DZXB.20220839

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Amdahl’s Law-Based Energy-Efficient Model for Heterogeneous Multicore Crypto-Processor

PAPERS | 更新时间：2025-12-11

- Amdahl’s Law-Based Energy-Efficient Model for Heterogeneous Multicore Crypto-Processor
- ACTA ELECTRONICA SINICA Vol. 52, Issue 3, Pages: 849-862(2024)
- 作者机构：
  
  战略支援部队信息工程大学，河南郑州 450000
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China(61404175);Scientific and Technological Project of Henan Province(202102210116)
- DOI：10.12263/DZXB.20220839
  CLC： TN492;TP309.7
- Received：18 July 2022，
  
  Revised：2023-01-31，
  
  Published：25 March 2024
- 稿件说明：
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李伟,郎俊豪,陈韬,等.基于Amdahl定律的异构多核密码处理器能效模型研究[J].电子学报,2024,52(03):849-862.

LI Wei, LANG Jun-hao, CHEN Tao, et al.Amdahl’s Law-Based Energy-Efficient Model for Heterogeneous Multicore Crypto-Processor[J].Acta Electronica Sinica, 2024, 52(03): 849-862.
李伟,郎俊豪,陈韬,等.基于Amdahl定律的异构多核密码处理器能效模型研究[J].电子学报,2024,52(03):849-862. DOI：10.12263/DZXB.20220839

LI Wei, LANG Jun-hao, CHEN Tao, et al.Amdahl’s Law-Based Energy-Efficient Model for Heterogeneous Multicore Crypto-Processor[J].Acta Electronica Sinica, 2024, 52(03): 849-862. DOI：10.12263/DZXB.20220839

摘要

边缘计算安全的资源受限特征及各种新型密码技术的应用，对多核密码处理器的高能效、异构性提出需求，但当前尚缺乏相关的异构多核能效模型研究.本文基于扩展Amdahl定律，引入密码串并特征、异构多核结构、数据准备时间、动态电压频率调节等因素，将核划分空闲、活跃状态，建立异构多核密码处理器的能效模型.MATLAB仿真结果表明，数据准备时间占比小于10%时，对能效的负面影响大幅下降；固定电压，频率缩放会影响能效值大小；处理器核空闲/活跃能耗比例越小，能效值越大.架构上，固定异构核，同构核数量与密码任务最大并行度相等时能效值最大，最佳异构核数可由模型变化参数仿真得到；多任务调度执行上，流水与并发执行有利于能效值的进一步提升.多核密码处理器芯片板级测试结果表明，仿真结果与实测数据相关系数接近1，芯片实测的数据准备时间、电压频率缩放等因素的影响与仿真分析基本一致，验证了所提能效模型的有效性.该文重点从影响能效变化趋势因素上，为多核密码处理器异构、高能效设计提供一定的理论分析基础与建议.

Abstract

The resource constraints of Edge Computing security and application of new cryptography technologies require the high energy efficiency and heterogeneity of multi-core cryptoprocessors

but there is still a lack of energy-efficient model. Based on extending Amdahl's law

this paper introduces the feature of cipher

heterogeneous multicore structure

data preparation time

dynamic voltage and frequency scaling

divides cores into idle and active states

then builds the energy-efficient model of heterogeneous multicore cryptoprocessor. MATLAB simulations show that the negative impact on energy efficiency is considerably reduced when the data preparation time is less than 10%. Fixed voltage and frequency scaling can affect the value of energy efficiency. The smaller the idle/active energy ratio of the processor core

the larger the energy efficiency value. On the architecture side

when the number of homogeneous cores is equal to the maximum parallelism of the cryptograph task

the energy efficiency value is largest when the number of heterogeneous cores is fixed

and the optimal number of heterogeneous cores can be simulated by varying the parameters of the model. In the execution of multi-task scheduling

pipelines and concurrent execution are beneficial to further increase the energy efficiency value. Board-level test results show that the correlation coefficient between simulation results and chip test data is close to 1

and the influence of measured data preparation time

voltage frequency scaling and other factors is essentially consistent with the simulation analysis

which verifies the effectiveness of the proposed energy efficiency model. In this paper

we focus on the factors affecting the energy efficiency trend and provide some theoretical analytical grounds and recommendations for heterogeneous and energy efficient design of multicore cryptographic processors.

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Keywords

references

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