SRAM-PUF Preselection Algorithm Based on Data Remanence Time

CHEN Ze-liang; KONG De-zhu; YIN Ai-guo; CHEN Ze-fu; ZHANG Pei-yong

doi:10.12263/DZXB.20221413

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SRAM-PUF Preselection Algorithm Based on Data Remanence Time

PAPERS | 更新时间：2025-12-11

- SRAM-PUF Preselection Algorithm Based on Data Remanence Time
- ACTA ELECTRONICA SINICA Vol. 52, Issue 5, Pages: 1478-1487(2024)
- 作者机构：
  
  1.浙江大学微纳电子学院，浙江杭州 310000
  2.珠海奔图电子有限公司，广东珠海 519000
- 作者简介：
- 基金信息：
  
  National Key Research and Development Program of China(2021YFB2206200)
- DOI：10.12263/DZXB.20221413
  CLC： TN4;
- Received：21 December 2022，
  
  Revised：2023-03-31，
  
  Published：25 May 2024
- 稿件说明：
移动端阅览
陈泽亮,孔德珠,尹爱国,等. 基于数据残留时间的SRAM-PUF预选算法[J]. 电子学报,2024,52(05):1478-1487.

CHEN Ze-liang, KONG De-zhu, YIN Ai-guo, et al. SRAM-PUF Preselection Algorithm Based on Data Remanence Time[J]. Acta Electronica Sinica, 2024, 52(05): 1478-1487.
陈泽亮,孔德珠,尹爱国,等. 基于数据残留时间的SRAM-PUF预选算法[J]. 电子学报,2024,52(05):1478-1487. DOI：10.12263/DZXB.20221413

CHEN Ze-liang, KONG De-zhu, YIN Ai-guo, et al. SRAM-PUF Preselection Algorithm Based on Data Remanence Time[J]. Acta Electronica Sinica, 2024, 52(05): 1478-1487. DOI：10.12263/DZXB.20221413

摘要

静态随机存取存储器（Static Random-Access Memory，SRAM）物理不可克隆函数（Physical Unclonable Function，PUF）利用参数设计完全相同的晶体管在制造过程中存在的工艺偏差，生成每块芯片无法克隆的密钥响应.由于SRAM-PUF内部错误分布的随机性，密钥重构需要使用纠错码，而纠错电路的面积与其纠错能力呈正相关，为了降低SRAM-PUF错误分布，减小纠错电路面积，本文通过对SRAM数据残留特性的研究，提出一种数据残留预选算法，对SRAM单元进行筛选，提高PUF响应稳定性，使用区块择优算法筛选SRAM区块，减小响应的分散度，以更短的时间和资源消耗生成SRAM-PUF响应，测试结果表明，在不同温度（-40 ℃~80 ℃）和±10%电压波动下，256位SRAM-PUF响应拥有99.8%的稳定性及

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953261&type=

2.53999996

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953262&type=

11.85333347

的误码率，相对于通用的临时多数表决（Temporal Majority Voting，TMV）算法提升了1.7%的稳定性，降低

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2.53999996

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953260&type=

10.83733368

倍误码率，与1 000次TMV相比，时间复杂度从

（2 000

）线性降低到

（900

）.经过72小时老化测试后，采用数据残留算法预选的SRAM-PUF稳定性仅下降0.2%.

Abstract

Static random-access memory (SRAM) physical unclonable function (PUF) makes use of the process deviation in the manufacturing process of transistors with identical parameter design

which generates the key response that cannot be cloned for each chip. Due to the randomness of SRAM-PUF internal error distribution

key reconstruction requires the use of error correction codes

and the area of error correction circuits is positively related to its error correction capability. In order to reduce the error distribution of SRAM-PUF and reduce the area of error correction circuits

this paper proposes a data remanence preselection algorithm through the research on characteristics of SRAM data remanence

screening SRAM cells

improving the stability of PUF response

and screening SRAM blocks using block optimization algorithm

reduce the dispersion of the response

which generates SRAM PUF response in a shorter time and resource consumption. Experimental results show that 256 bits SRAM-PUF response has 99.8% stability and

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953261&type=

2.53999996

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953262&type=

11.85333347

bit error rate under different temperatures (-40 ℃~80 ℃) and ±10% voltage fluctuations. Compared with the general temporary majority voting (TMV) algorithm

the stability is improved by 1.7% and the error rate is reduced by

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2.53999996

https://html.publish.founderss.cn/rc-pub/api/common/picture?pictureId=61953265&type=

10.83733368

times

compared with 1 000 times of TMV

linear reduction of time complexity from

(2 000

) to

(900

). After 72 hours of aging testing

the stability of the SRAM-PUF pre-selected using the data remanence algorithm only decreased by 0.2%.

关键词

Keywords

references

DEVADAS S , SUH E , PARAL S , et al . Design and implementation of PUF-based "unclonable" RFID ICs for anti-counterfeiting and security applications [C ] // 2008 IEEE International Conference on RFID . Piscataway : IEEE , 2008 : 58 - 64 .

MAITI A , CASARONA J , MCHALE L , et al . A large scale characterization of RO-PUF [C ] // 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) . Piscataway : IEEE , 2010 : 94 - 99 .

KUMAR S S , GUAJARDO J , MAES R , et al . Extended abstract: The butterfly PUF protecting IP on every FPGA [C ] // 2008 IEEE International Workshop on Hardware-Oriented Security and Trust . Piscataway : IEEE , 2008 : 67 - 70 .

KUMAR R , BURLESON W . On design of a highly secure PUF based on non-linear current mirrors [C ] // 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) . Piscataway : IEEE , 2014 : 38 - 43 .

HOLCOMB D E , BURLESON W P , FU K . Power-up SRAM state as an identifying fingerprint and source of true random numbers [J ] . IEEE Transactions on Computers , 2009 , 58 ( 9 ): 1198 - 1210 .

SIMONS P W , VAN DER S E . Physical Unclonable Function : US20130234771 [P ] . 2013-09-12 .

KANG H , HORI Y , SATOH A . Performance evaluation of the first commercial PUF-embedded RFID [C ] // The 1st IEEE Global Conference on Consumer Electronics . Piscataway : IEEE , 2012 : 5 - 8 .

KANG H , HORI Y , KATASHITA T , et al . Cryptographie key generation from PUF data using efficient fuzzy extractors [C ] // 16th International Conference on Advanced Communication Technology . Piscataway : IEEE , 2014 : 23 - 26 .

WANG W D , SINGH A , GUIN U , et al . Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs [C ] // 2018 IEEE 19th Latin-American Test Symposium (LATS) . Piscataway : IEEE , 2018 : 1 - 6 .

SARAZA-CANFLANCA P , CARRASCO-LOPEZ H , BROX P , et al . Improving the reliability of SRAM-based PUFs in the presence of aging [C ] // 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS) . Piscataway : IEEE , 2020 : 1 - 6 .

LIU K Y , MIN Y , YANG X , et al. A 373 F 2 2D power-gated EE SRAM physically unclonable function with dark-bit detection technique[C ] // 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) . Piscataway : IEEE , 2018 : 161 - 164 .

HE Y , LI D , YU Z H , et al. 36.5 an automatic self-checking and healing physically unclonable function (PUF) with < 3×10- 8 bit error rate[C ] // 2021 IEEE International Solid-State Circuits Conference (ISSCC) . Piscataway : IEEE , 2021 : 506 - 508 .

SHIFMAN Y , MILLER A , KEREN O , et al . A method to utilize mismatch size to produce an additional stable bit in a tilting SRAM-based PUF [J ] . IEEE Access , 2020 , 8 : 219137-219150.

BHARGAVA M , MAI K . An efficient reliable PUF-based cryptographic key generator in 65nm CMOS [C ] // 2014 Design , Automation & Test in Europe Conference & Exhibition (DATE) . Piscataway : IEEE , 2014 : 1 - 6 .

BATURONE I , PRADA-DELGADO M A , EIROA S . Improved generation of identifiers, secret keys, and random numbers from SRAMs [J ] . IEEE Transactions on Information Forensics and Security , 2015 , 10 ( 12 ): 2653 - 2668 .

MATHEW S K , SATPATHY S K , ANDERS M A , et al . 16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS [C ] // 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) . Piscataway : IEEE , 2014 : 278 - 279 .

MATHEW S , SATPATHY S , SURESH V , et al . A 4fJ/bit delay-hardened physically unclonable function circuit with selective bit destabilization in 14nm tri-gate CMOS [C ] // 2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits) . Piscataway : IEEE , 2016 : 1 - 2 .

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