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无锡华润上华科技有限公司器件工程部,江苏无锡 210041
Received:06 January 2023,
Revised:2023-06-08,
Published:25 May 2024
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邵红,李永顺,宋亮,等. 基于HTO的LDMOS器件结构及其热载流子注入退化研究[J]. 电子学报,2024,52(05):1582-1590.
SHAO Hong, LI Yong-shun, SONG Liang, et al. Research on HTO-Based LDMOS Device Structure and Its Hot Carrier Injection Degradation[J]. Acta Electronica Sinica, 2024, 52(05): 1582-1590.
邵红,李永顺,宋亮,等. 基于HTO的LDMOS器件结构及其热载流子注入退化研究[J]. 电子学报,2024,52(05):1582-1590. DOI:10.12263/DZXB.20230025
SHAO Hong, LI Yong-shun, SONG Liang, et al. Research on HTO-Based LDMOS Device Structure and Its Hot Carrier Injection Degradation[J]. Acta Electronica Sinica, 2024, 52(05): 1582-1590. DOI:10.12263/DZXB.20230025
为满足中低压消费电子的市场需求,小尺寸高密度Bipolar-CMOS-DMOS技术得到了蓬勃发展,低损耗和高可靠成为Bipolar-CMOS-DMOS技术中横向双扩散金属氧化物半导体场效应管(Lateral Double-diffused Metal-Oxide-Semiconductor field effect transistor,LDMOS)设计的重点和难点.本文介绍了一种基于高温氧化层(High Temperature Oxidation layer,HTO)结构的LDMOS,并对其热载流子注入退化机制进行了研究分析,利用高温氧化层结构改善了传统浅槽隔离(Shallow Trench Isolation,STI)结构中氧化物台阶嵌入半导体内部对器件热载流子注入造成的不利影响,提高器件可靠性,同时还缩短了器件导通情况下的电流路径长度,降低损耗.此外本文还提出了对P型体区的工艺优化方法,利用多晶硅作为高能量离子注入的掩蔽层,改善阱邻近效应对器件鲁棒性的影响,同时形成更深的冶金结,可以辅助漂移区杂质离子耗尽,降低漂移区表面电场,在不需要额外增加版次的情况下提高了器件击穿电压.最终得到的基于HTO结构的LDMOS击穿电压为43 V,比导通电阻为9.5 mΩ·mm
2
,线性区电流在10 000 s之后的退化量仅为0.87%.
In order to meet the market demand of medium and low voltage consumer electronics
the small size and high density Bipolar-CMOS-DMOS technology has been vigorously developed. Low loss and high reliability have become the focus and difficulty in the design of lateral double-diffused metal-oxide-semiconductor field effect transistors in Bipolar-CMOS-DMOS technology. This paper introduces a lateral double-diffused metal-oxide-semiconductor field effect transistor based on the high temperature oxidation layer structure
and studies and analyzes the degradation mechanism of its hot carrier injection. The high temperature oxidation layer structure is used to improve the traditional shallow trench isolation structure
in which the oxide steps embedded in the semiconductor have adverse effects on the hot carrier injection of the device. Thus improve the reliability of the device. The proposed structure shortens the current path length in the on state of the device and reduces the loss. In addition
this paper also proposes a self-aligned implantation process optimization method for the P-type body region. By increasing the implantation process of the high-energy body region
the depletion region in the accumulation area is expanded
the surface electric field of the drift region is reduced
and the breakdown voltage is improved. The proposed HTO-LDMOS has a breakdown voltage of 43 V
a specific on-resistance of 9.5 mΩ·mm
2
and a linear region current degradation of 0.87% after 10 000 s.
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