National Natural Science Foundations of China(62304165);China Postdoctoral Science Foundation Special Funding(2024T170691);China postdoctoral science foundation(2023M732745);National Funded Postdoctoral Program of China(GZC20232024);Shaanxi Province Postdoctoral Scientific Research Project Grant(30102230001)
LI Zhao-xi, SU Zhen-yu, TIAN Yu-hao, et al. Multi-Objective Design Method for Single-Stage Fully Differential Folded Cascode Operational Amplifiers Based on the Artificial Intelligence Algorithm[J]. Acta Electronica Sinica, 2025, 53(06): 1784-1791.
LI Zhao-xi, SU Zhen-yu, TIAN Yu-hao, et al. Multi-Objective Design Method for Single-Stage Fully Differential Folded Cascode Operational Amplifiers Based on the Artificial Intelligence Algorithm[J]. Acta Electronica Sinica, 2025, 53(06): 1784-1791. DOI:10.12263/DZXB.20250055
Multi-Objective Design Method for Single-Stage Fully Differential Folded Cascode Operational Amplifiers Based on the Artificial Intelligence Algorithm
With the advancement of integrated circuit manufacturing technology
analog integrated circuit design faces the challenge of trade-offs between performance metrics such as power consumption and gain. Traditional design methods
reliant on approximate equations and iterative refinement
are inefficient. This paper presents an artificial intelligence algorithm-based multi-objective design strategy for the design of a single-stage fully differential folded cascode operational amplifier. This method employs a neural network model to characterize the mapping relationship between design parameters and eight performance metrics
and sets the target performance for the operational amplifier to achieve through fitness functions and constraint conditions
then utilizes particle swarm optimization (PSO) algorithm to search for the optimal fitness. Experimental results show that multiple metrics exceed design targets
with a maximum voltage gain of 65 dB and a phase margin of 74°. Using this method
we can quickly and accurately obtain operational amplifier parameters that meet design specifications. Compared to manual calculations
this method reduces the running time to merely 906 seconds
significantly improving the design efficiency. It can be applied to more large-scale circuit designs in the future.
BEHZAD RAZAVI . Design of Analog Cmos Integrated Circuits [M ] . CHEN G C, translate. 2nd ed . Xi’an : Xi’an Jiaotong University Press , 2018 . (in Chinese)
MALLYA S , NEVIN J H . Design procedures for a fully differential folded-cascode CMOS operational amplifier [J ] . IEEE Journal of Solid-State Circuits , 1989 , 24 ( 6 ): 1737 - 1740 .
于浩 , 郭裕顺 , 李康 . 基于 g m / I d 参数的CMOS运算放大器设计重用方法 [J ] . 电子学报 , 2019 , 47 ( 8 ): 1626 - 1632 .
YU H , GUO Y S , LI K . A g m / I d based methodology for design reuse of CMOS operational amplifiers [J ] . Acta Electronica Sinica , 2019 , 47 ( 8 ): 1626 - 1632 . (in Chinese)
FAYAZI M , COLTER Z , AFSHARI E , et al . Applications of artificial intelligence on the modeling and optimization for analog and mixed-signal circuits: A review [J ] . IEEE Transactions on Circuits and Systems I: Regular Papers , 2021 , 68 ( 6 ): 2418 - 2431 .
RASHID R , NAMBATH N . Area optimisation of two stage miller compensated op-amp in 65 nm using hybrid PSO [J ] . IEEE Transactions on Circuits and Systems II: Express Briefs , 2022 , 69 ( 1 ): 199 - 203 .
CHEVALIER M , TROCHUT S , GUIZZETTI R , et al . Reinforcement learning for analog sizing optimization [C ] // 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design . Piscataway : IEEE , 2023 : 1 - 4 .
LBERNI A , MARKTANI M A , AHAITOUF A , et al . Efficient butterfly inspired optimization algorithm for analog circuits design [J ] . Microelectronics Journal , 2021 , 113 : 105078 .
SASIKUMAR A , SUBRAMANIYASWAMY V , JANNALI R , et al . Design and area optimization of CMOS operational amplifier circuit using hybrid flower pollination algorithm for IoT end-node devices [J ] . Microprocessors and Microsystems , 2022 , 93 : 104610 .
IVANOVA M , STOŠOVIĆ M A . Machine learning and rules induction in support of analog amplifier design [J ] . Computation , 2022 , 10 ( 9 ): 145 .
ABUELNASR A , RAGAB A , AMER M , et al . Incremental reinforcement learning for multi-objective analog circuit design acceleration [J ] . Engineering Applications of Artificial Intelligence , 2024 , 129 : 107426 .
DE B P , KAR R , MANDAL D , et al . An efficient design of CMOS comparator and folded cascode op-amp circuits using particle swarm optimization with an aging leader and challengers algorithm [J ] . International Journal of Machine Learning and Cybernetics , 2016 , 7 ( 2 ): 325 - 344 .
YANG Y Q , YIN X Y , CHEN D D , et al . The high-efficiency optimization design method for two-stage miller compensated operational amplifier [J ] . IEEE Transactions on Circuits and Systems II: Express Briefs , 2024 , 71 ( 4 ): 2029 - 2033 .
LBERNI A , MARKTANI M A , AHAITOUF A , et al . Analog circuit sizing based on evolutionary algorithms and deep learning [J ] . Expert Systems with Applications , 2024 , 237 : 121480 .
WANG J Q , LÜ G C , GUO Y S . An accurate design approach for the folded cascode operational amplifier [J ] . Electronic Science and Technology , 2023 , 36 ( 3 ): 50 - 54, 68 . (in Chinese)
ZHU Z D , PENG X H , LU¨ B Q , et al . Design of high performance folded-cascode operational amplifier [J ] . Microelectronics , 2012 , 42 ( 2 ): 146 - 149 . (in Chinese)