Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation

WANG Peng-jun; HAO Li-peng; ZHANG Yue-jun

doi:10.3969/j.issn.0372-2112.2012.11.007

您当前的位置：

首页 >

文章列表页 >

Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation

更新时间：2025-07-16

- Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation
- Acta Electronica Sinica Vol. 40, Issue 11, Pages: 2183-2187(2012)
- 作者机构：
  
  宁波大学电路与系统研究所,浙江,宁波,315211
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61274132, No.61076032);Doctoral Foundation (No.20113305110005);Program of Key Science and Technology Innovation Team of Zhejiang Province (No.2011R09021-04);Technology Innovation Program of University Students in Zhejiang province (New Talent Project)
- DOI：10.3969/j.issn.0372-2112.2012.11.007
  CLC： TN918.4
- Published：2012
- 稿件说明：
移动端阅览
WANG Peng-jun, HAO Li-peng, ZHANG Yue-jun. Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation[J]. Acta Electronica Sinica, 2012, 40(11): 2183-2187.
DOI：

WANG Peng-jun, HAO Li-peng, ZHANG Yue-jun. Design of AES SubByte Module of Anti-Zero Value Power Attack and Its VLSI Implementation[J]. Acta Electronica Sinica, 2012, 40(11): 2183-2187. DOI： 10.3969/j.issn.0372-2112.2012.11.007.

摘要

密码器件在执行高级加密标准(Advanced Encryption Standard

AES)时常以能量消耗方式泄漏密钥信息

为有效降低其与实际处理数据之间的相关性

该文提出一种具有防御零值功耗攻击性能的AES SubByte模块设计及其VLSI实现方案.首先

在分析GF(256)域求逆算法的基础上

采用关键模块复用的方法

提出一种更为有效的加法性屏蔽求逆算法;然后依此进一步得到一种新型的SubByte模块结构

实现在不影响对所有中间数据进行加法性屏蔽编码的同时

减少电路的芯片开销、提高电路的工作速度.实验结果表明

所设计的电路具有正确的逻辑功能.与传统SubByte模块比较

该设计的最高工作频率和面积都有较大的优化.

Abstract

The secret information of cipherware leaks as energy consumption during AES implementation.To reduce the correlation between the secret information and the processing data effectively

this paper investigate a design of AES SubByte module of anti-zero value power attack and its VLSI implementation.First

by analyzing the traditional GF(256) inversion algorithm

an improved additive masking GF(256) inversion algorithm which adopts key module reuse method is proposed.Then a novel SubByte module structure is constructed by applying such algorithm

which has significant area and speed improvement and all data can be additive masked.The experimental results show that the novel scheme has correct logic function.Compared with traditional SubByte module

a remarkable improvement is achieved by the proposed approach on highest working frequency and area.

关键词

Keywords

references

Views

2370

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Automatic Error Correcting Hardware Implementation of AES Algorithm

Related Author

TANG Ming

ZHANG Guo-ping

ZHANG Huan-guo

Related Institution

School of Computer, Wuhan University

.709th Research Institution

School of ComputerWuhan UniversityWuhanHubei 430072China

.709th Research InstitutionWuhanHubei 430074China

⁰