Reliability Calculation Method of Logical Circuit Based on Bernoulli Distribution

CAI Shuo; KUANG Ji-shun; LIU Tie-qiao; LING Chun-qing; YOU Zhi-qiang

doi:10.3969/j.issn.0372-2112.2015.11.023

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Reliability Calculation Method of Logical Circuit Based on Bernoulli Distribution

更新时间：2025-07-16

- Reliability Calculation Method of Logical Circuit Based on Bernoulli Distribution
- Acta Electronica Sinica Vol. 43, Issue 11, Pages: 2292-2297(2015)
- 作者机构：
  
  1. 湖南大学信息科学与工程学院,湖南,长沙,410082
  2. 长沙理工大学计算机与通信工程学院,湖南,长沙,410114
  3. 杭州电子科技大学管理学院,浙江,杭州,310018
  4. 湖南大学信息科学与工程学院,湖南,长沙,410082
  5. 长沙理工大学计算机与通信工程学院,湖南,长沙,410114
  6. 杭州电子科技大学管理学院,浙江,杭州,310018
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61303042, No.60773207, No.61472123);Research Fund of Education Department of Hunan Province (No.14C0028)
- DOI：10.3969/j.issn.0372-2112.2015.11.023
  CLC： TN406
- Published：2015
- 稿件说明：
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CAI Shuo, KUANG Ji-shun, LIU Tie-qiao, et al. Reliability Calculation Method of Logical Circuit Based on Bernoulli Distribution[J]. Acta Electronica Sinica, 2015, 43(11): 2292-2297.
DOI：

CAI Shuo, KUANG Ji-shun, LIU Tie-qiao, et al. Reliability Calculation Method of Logical Circuit Based on Bernoulli Distribution[J]. Acta Electronica Sinica, 2015, 43(11): 2292-2297. DOI： 10.3969/j.issn.0372-2112.2015.11.023.

摘要

在深亚微米及纳米级集成电路设计过程中

电路的可靠性评估是非常重要的一个环节.本文提出了一种利用概率统计模型计算逻辑电路可靠度的方法

将电路中的每个逻辑门是否正常输出看作一次随机事件

则发生故障的逻辑门数为某个特定值的概率服从伯努利分布;再利用实验统计单个逻辑门出错时电路的逻辑屏蔽特性

根据此方法计算出ISCAS'85和ISCAS'89基准电路可靠度的一个特定范围.理论分析和实验结果表明所提方法是准确和有效的.

Abstract

Reliability estimation of logical circuit is becoming an important feature in the design process of deep submicron and nanoscale systems.In this paper

a reliability calculation method of logical circuit based on probability statistical model is proposed.Based on this model

the correctness of every logic gate is regarded as random event and obeying Bernoulli distribution.Meanwhile

simulation experimental results are given to analyze the logical masking properties of the circuit when only one gate set as faulty.To validate the proposed methodology we have studied the reliability range of ISCAS'85 and ISCAS'89 benchmark circuits.Theoretical analysis and experimental results show our method is accurate and efficient.

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