An Instruction Verification Based Hardware/Software Co-design Approach for Mitigating Code-Reuse Attacks

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doi:10.3969/j.issn.0372-2112.2016.10.018

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An Instruction Verification Based Hardware/Software Co-design Approach for Mitigating Code-Reuse Attacks

更新时间：2025-07-16

- An Instruction Verification Based Hardware/Software Co-design Approach for Mitigating Code-Reuse Attacks
- Acta Electronica Sinica Vol. 44, Issue 10, Pages: 2403-2409(2016)
- 作者机构：
  
  1. 中国人民解放军装备学院国防科技重点实验室,北京,101416
  2. 中国人民解放军装备学院国防科技重点实验室,北京,101416
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61202129)
- DOI：10.3969/j.issn.0372-2112.2016.10.018
  CLC： TP303
- Published：2016
- 稿件说明：
移动端阅览
L. An Instruction Verification Based Hardware/Software Co-design Approach for Mitigating Code-Reuse Attacks[J]. Acta Electronica Sinica, 2016, 44(10): 2403-2409.
DOI：

L. An Instruction Verification Based Hardware/Software Co-design Approach for Mitigating Code-Reuse Attacks[J]. Acta Electronica Sinica, 2016, 44(10): 2403-2409. DOI： 10.3969/j.issn.0372-2112.2016.10.018.

摘要

面向x86处理器的代码重用攻击难于防护的一个重要原因是，在x86程序代码中存在大量合法但非编程者预期要执行的指令.这些在代码中大量存在的非预期指令可被用于构造实现CRA的组件.先前研究均采用软件方法解决非预期指令问题，运行开销大且应用受限.本文的主要贡献之一是提出了一种低开销的软硬件协同方法来解决x86的非预期指令问题.实验表明，本文的实现方法仅给应用程序带来了-0.093%~2.993%的额外运行开销.此外，本文还提出采用硬件实现的控制流锁定作为一项补充技术.通过同时采用两个技术，可以极大降低x86平台遭受代码重用攻击的风险.

Abstract

Code-reuse attacks (CRAs) are difficult to detect and defend

especially on widely used x86 processors.One reason is that lots of unintended but legal instructions exist in x86 binary codes.The unintended instructions make the finding of so called gadgets for CRAs is much easier than that of RISC processors.Previous studies rely on software-only means to tackle the unintended instruction problem

which makes their approaches are either very costly or can only be applied under restricted conditions.In this paper

we propose a hardware/software co-design approach to tackle the unintended instruction problem.The proposed mechanism has little performance impact on the examined SPEC CPU 2006 benchmarks.We also propose using hardware control-flow locking as a complementary technique.By using the two techniques together

an attacker will have little chance to carry out CRAs on x86 processors.

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