The circuit offset often causes integration saturation in the traditional sigma-delta interface of capacitive MEMS accelerometers.To address this problem

a new type of capacitive digital interface circuit used for downhole exploration and oil detection is designed.This paper presents a MEMS-based 5th-order sigma-delta capacitive accelerometer

where the 3rd-order digital loop filter is realized using FPGA.This will reduce the ASIC analog circuit layout design and chip testing difficulties and is easy to optimize the loop filter parameters

which can be used to improve the system stability and optimize the noise performance.The analog-frond-end amplifier (AFE) is realized by using a simple correlated double sampling (CDS)

which is one effective method to reduce circuit offset of AFE.According to the Gaussian distribution of AFE output signal

one new type 8-bit instantaneous floating point ADC (IFP ADC) is designed.The IFP ADC is used to convert analog signal of AFE to digital signal to feed the 3rd-order digital loop filter.The whole system provides a significantly low noise floor 53.09ng/rt(Hz) overall a 200 Hz bandwidth.In this work

the AFE amplifier and ADC were successfully fabricated by using XFAB XH018 mixed-signal CMOS process.Furthermore

the sensitivity and noise floor of the AFE amplifier are 0.69V/pF and 3.20 V/rt(Hz) in open loop measurement

respectively.