Investigation on Low-Frequency Noise Models and Representation for Reliability of CMOS Inverter

CHEN Xiao-juan; CHEN Dong-yang; WU Jie

doi:10.3969/j.issn.0372-2112.2016.11.012

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Investigation on Low-Frequency Noise Models and Representation for Reliability of CMOS Inverter

更新时间：2025-07-16

- Investigation on Low-Frequency Noise Models and Representation for Reliability of CMOS Inverter
- Acta Electronica Sinica Vol. 44, Issue 11, Pages: 2646-2652(2016)
- 作者机构：
  
  1. 长春理工大学电子信息工程学院,吉林,长春,130022
  2. 东北电力大学信息工程学院,吉林,吉林,132012
  3. 北华大学电气信息工程学院,吉林,吉林,132013
  4. 长春理工大学电子信息工程学院,吉林,长春,130022
  5. 东北电力大学信息工程学院,吉林,吉林,132012
  6. 北华大学电气信息工程学院,吉林,吉林,132013
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61271115)
- DOI：10.3969/j.issn.0372-2112.2016.11.012
  CLC： TN94
- Published Online：25 November 2016，
  
  Published：2016
- 稿件说明：
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CHEN Xiao-juan, CHEN Dong-yang, WU Jie. Investigation on Low-Frequency Noise Models and Representation for Reliability of CMOS Inverter[J]. Acta Electronica Sinica, 2016, 44(11): 2646-2652.
DOI：

CHEN Xiao-juan, CHEN Dong-yang, WU Jie. Investigation on Low-Frequency Noise Models and Representation for Reliability of CMOS Inverter[J]. Acta Electronica Sinica, 2016, 44(11): 2646-2652. DOI： 10.3969/j.issn.0372-2112.2016.11.012.

摘要

为了表征CMOS反相器的可靠性，从其负载电流和输出电压的特性入手，详细推导了一种基于载流子波动理论的低频噪声模型，并由实验数据验证了模型的准确性.由实验结果可知，负载电流功率谱密度随频率的增加而减小，遵循1/

噪声的变化规律；得到了负载电流归一化噪声功率谱密度与器件尺寸的关系.通过深入研究1/

噪声与界面态陷阱密度的关系，验证了1/

噪声可用于表征CMOS反相器的可靠性，证明了噪声幅值越大，器件可靠性越差，失效率显著增大，为评价CMOS反相器的靠性提供了一种可行及有效的方法.

Abstract

In order to characterize the reliability of CMOS inverter

a kind of low-frequency noise model is deduced in detail by using the characteristics of load current and output voltage

based on the carrier fluctuation theory

and the accuracy of the model was verified by experimental data.The experiment results indicate that load current power spectral follows the changing rule of the 1/

noise

decreasing with the increase of frequency;the normalized noise power spectral density of load current decreases with the increase of the channel width or length.Using the experimental data

the relationship between 1/

noise and interface trap state densityof CMOS inverter is established.Verify that the 1/

noi

se can be used to characterize the reliability of CMOS inverter.It is proved that the larger interface trap state density

the larger the noise magnitude

leading to the degradation of device reliability and significant rise in device invalidation rate.That provides a feasible and effective method for evaluating the reliability of CMOS inverter.

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