YU Le, CHEN Yan, LI Yang-yang, et al. Design and Optimization of FPGA Clock Network Based on Parameterized Model[J]. Acta Electronica Sinica, 2017, 45(7): 1686-1694.
DOI:
YU Le, CHEN Yan, LI Yang-yang, et al. Design and Optimization of FPGA Clock Network Based on Parameterized Model[J]. Acta Electronica Sinica, 2017, 45(7): 1686-1694. DOI: 10.3969/j.issn.0372-2112.2017.07.019.
Design and Optimization of FPGA Clock Network Based on Parameterized Model
This paper proposes a methodology for the design and optimization of CDN (Clock Distributed Network) in full custom FPGA systems based on parameterized models of the structural sizes of the key components of CDN systems.The characteristic model proposed herein divides structural sizes into two categories:topology structure
and circuit and interconnect
and provides the design methodology of these two types of sizes.The paper establishes two sets of structure parameters for H-tree
fish-bone and mixed clock networks in standard CMOS 0.13 m technology
each representing CDN with or without optimizations.And then we compares the performance in terms of transmission delay
clock skew
power consumption
chip area
among a multitude of other parameters.Experiment results indicate that mixed structure results in the greatest reductions of transmission delay and clock skew by 20.89% and 63.20%
respectively;fish-bone structure achieves the best reductions in chip area by 50.14%
while H-tree structure reduces in transmission delay and power consumption by 7.37% and 8.33%
respectively
which strongly confirms the proposed design and optimization methodology.