2-D Compression and Parallel Decoding of VLIW Based on Stream Architecture

LI Gong-li; DAI Zi-bin; XU Jin-hui; WANG Shou-cheng; ZHU Yu-fei; LI Dan

doi:10.3969/j.issn.0372-2112.2017.09.029

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2-D Compression and Parallel Decoding of VLIW Based on Stream Architecture

更新时间：2025-07-16

- 2-D Compression and Parallel Decoding of VLIW Based on Stream Architecture
- Acta Electronica Sinica Vol. 45, Issue 9, Pages: 2256-2262(2017)
- 作者机构：
  
  1. 河南师范大学计算机与信息工程学院,河南,新乡,453002
  2. 中国人民解放军61840部队,北京,100089
  3. 解放军信息工程大学,河南,郑州,450001
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61404175)
- DOI：10.3969/j.issn.0372-2112.2017.09.029
  CLC： TP302
- Published Online：25 September 2017，
  
  Published：2017
- 稿件说明：
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LI Gong-li, DAI Zi-bin, XU Jin-hui, et al. 2-D Compression and Parallel Decoding of VLIW Based on Stream Architecture[J]. Acta Electronica Sinica, 2017, 45(9): 2256-2262.
DOI：

LI Gong-li, DAI Zi-bin, XU Jin-hui, et al. 2-D Compression and Parallel Decoding of VLIW Based on Stream Architecture[J]. Acta Electronica Sinica, 2017, 45(9): 2256-2262. DOI： 10.3969/j.issn.0372-2112.2017.09.029.

摘要

VLIW（Very Long Instruction Word）指令因为含有较多的空操作导致严重的代码体积膨胀问题，代码压缩是解决这一问题的有效措施.VLIW代码压缩需要解决三个关键问题，一是提高压缩率；二是降低解压操作对性能的影响；三是分支目标重定位.针对流体系结构上的VLIW指令特点，提出了二维压缩，对VLIW进行垂直与水平两个方向上的压缩，且水平解压可以与代码执行并行，并通过设置堆栈寄存器缓存循环入口地址.实验结果表明二维压缩有效解决了VLIW代码体积膨胀问题，可以使指令存储器的面积减少36.48%，并使得整个CISP系统面积减少了7.85%.

Abstract

Due to having many NOPs

VLIW(Very Long Instruction Word) exists serious code size expansion problem.As an efficient way to solve this problem

the code compression needs to deal with three key points:improving the compression ratio (CR)

simplifying decomposition operations

and relocating the branch target.According to the characteristics of VLIW on stream architecture

a two-dimension(2-D) compression scheme is put forward

where VLIW code is compressed in both vertical and horizontal directions

the horizontal decompression and code execution can be implemented in parallel

and loop entrance addresses are buffered by stack registers.The experiment results illustrate that 2-D compression scheme can resolve code expansion issue effectively.Specifically

it has achieved a 36.48% area reduction of the on-chip instruction memory and a 7.85% area reduction of the CISP system.

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