LI Lei, FANG Nian, WANG Lu-tang, et al. Improving Memory Capacity of Hardware Reservoir Computing by Multiple Feedback Loops[J]. Acta Electronica Sinica, 2018, 46(2): 298-303.
DOI:
LI Lei, FANG Nian, WANG Lu-tang, et al. Improving Memory Capacity of Hardware Reservoir Computing by Multiple Feedback Loops[J]. Acta Electronica Sinica, 2018, 46(2): 298-303. DOI: 10.3969/j.issn.0372-2112.2018.02.006.
Improving Memory Capacity of Hardware Reservoir Computing by Multiple Feedback Loops
In order to improve the memory capacity of hardware reservoir computing (HRC) based on a single feedback loop
a HRC scheme based on multiple feedback loops is proposed. Adding extra loops can feedback the responses stimulated by past input signals into the reservoir to increase the HRC memory capacity. Investigations on the performances of HRCs based on a single and multiple feedback loops were carried out by numerical simulation for the memory capacity and a NARMA30 task which needs a long memory capacity. Results show that the HRC memory capacity is increased to 40.2 at ten loops from 18.2 at a single loop when the node number is 50. For the NARMA30 task
the Normalized Root Mean Square Error is decreased to 0.09 at two loops from 0.27 at a single loop when the node number is 1000. Therefore
specific memory capacity needed by a task can be designed through setting the parameters of feedback loops
partially solving the adaptive problem of reservoir computing.