Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric

YAO Jia-fei; GUO Yu-feng; LI Man; WANG Zi-xuan; HU Shan-wen; XIA Tian

doi:10.3969/j.issn.0372-2112.2018.07.035

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Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric

更新时间：2025-07-16

- Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric
- Acta Electronica Sinica Vol. 46, Issue 7, Pages: 1781-1786(2018)
- 作者机构：
  
  1. 南京邮电大学,江苏,南京,210003
  2. 射频集成与微组装技术国家地方联合工程实验室,江苏,南京,210003
  3. 佛蒙特大学, 美国佛蒙特州,05405
  4. 南京邮电大学,江苏,南京,210003
  5. 射频集成与微组装技术国家地方联合工程实验室,江苏,南京,210003
  6. 佛蒙特大学美国佛蒙特州,05405
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61574081, No.61704084);Natrual Science General Program of Colleges and Universities in Jiangsu Province (No.17KJB510042);Open Project of National and Local Joint Engineering Laboratory for Radio Frequency Integration and Micro-assembly Technology (No.KFJJ20170302)
- DOI：10.3969/j.issn.0372-2112.2018.07.035
  CLC： TN31
- Published Online：25 July 2018，
  
  Published：2018
- 稿件说明：
移动端阅览
YAO Jia-fei, GUO Yu-feng, LI Man, et al. Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric[J]. Acta Electronica Sinica, 2018, 46(7): 1781-1786.
DOI：

YAO Jia-fei, GUO Yu-feng, LI Man, et al. Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric[J]. Acta Electronica Sinica, 2018, 46(7): 1781-1786. DOI： 10.3969/j.issn.0372-2112.2018.07.035.

摘要

本文提出了一种具有高k介质阶梯变宽度结构的新型的SOI LDMOS器件，该器件通过在漂移区内引入介质区域使得漂移区的宽度呈阶梯变化.借助三维器件仿真软件DAVINCI对其势场分布及耐压特性进行了深入分析.首先，阶梯变宽度结构能够在漂移区内引入新的电场峰值来优化势场分布，提高击穿电压.其次，采用高k材料作为侧壁介质区域可以进一步优化漂移区内势场分布，并提高漂移区浓度来降低导通电阻.结果表明，与常规结构相比，新器件的击穿电压可提高42%，导通电阻可降低37.5%，其FOM优值是常规器件的3.2倍.

Abstract

In this paper

a novel SOI LDMOS with step width drift region using high-k dielectric is proposed and investigated by a 3D simulator named DAVINCI.The drift region of new device is divided into several regions with different width using the high-k dielectric.First

new additional electric field peaks are formed at the steps

which enhances the breakdown voltage.Second

the high-k dielectric modulates the potential and electric field distributions to further improve the breakdown voltage

and allows keeping a higher drift doping concentration to reduce the specific on-resistance.Compared with the conventional device

a 42% increase in the breakdown voltage and a 37.5% decrease in the specific on-resistance are obtained in the new SOI LDMOS.The FOM of new device is 3.2 times of the conventional device.

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