Analysis and Design of Coplanar Five-Input Majority Gate in Quantum-Dot Cellular Automata

DENG Fei-fei; XIE Guang-jun; WANG Xiao-yang; CHENG Xin; ZHANG Yong-qiang

doi:10.3969/j.issn.0372-2112.2020.05.005

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Analysis and Design of Coplanar Five-Input Majority Gate in Quantum-Dot Cellular Automata

更新时间：2025-07-16

- Analysis and Design of Coplanar Five-Input Majority Gate in Quantum-Dot Cellular Automata
- Acta Electronica Sinica Vol. 48, Issue 5, Pages: 861-869(2020)
- 作者机构：
  
  合肥工业大学电子科学与应用物理学院,安徽,合肥,230009
- 作者简介：
- 基金信息：
  
  National Natural Science Foundation of China (No.61271122);Fundamental Research Funds for the Central Universities (No.JZ2019HGTB0092)
- DOI：10.3969/j.issn.0372-2112.2020.05.005
  CLC： TN389
- Published Online：25 May 2020，
  
  Published：2020
- 稿件说明：
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DENG Fei-fei, XIE Guang-jun, WANG Xiao-yang, et al. Analysis and Design of Coplanar Five-Input Majority Gate in Quantum-Dot Cellular Automata[J]. Acta Electronica Sinica, 2020, 48(5): 861-869.
DOI：

DENG Fei-fei, XIE Guang-jun, WANG Xiao-yang, et al. Analysis and Design of Coplanar Five-Input Majority Gate in Quantum-Dot Cellular Automata[J]. Acta Electronica Sinica, 2020, 48(5): 861-869. DOI： 10.3969/j.issn.0372-2112.2020.05.005.

摘要

量子元胞自动机（Quantum-dot Cellular Automata，QCA）是一种具有新型计算范式的纳米器件，它是未来有望替代传统CMOS器件的有力竞争者之一.本文首先从QCA器件的功耗角度出发，对影响半径为41nm的QCA共面系统中元胞的耦合度进行建模，根据元胞之间的位置关系构造QCA门结构模型，据此对现有的共面五输入择多门进行分类，通过性能分析总结其结构特点，以此设计出一个新的低功耗五输入择多门，测试结果表明该结构功耗最低且其他性能也相对较优.另外，为验证所提出五输入择多门在电路中的性能，本文选择MR Azghadi全加器设计了一款共面QCA全加器，与同类加法器相比性能也最优.

Abstract

Quantum-dot cellular automata (QCA) is a kind of nano-devices with special computing paradigm

which is one of powerful competitors to replace traditional CMOS devices in the future. Based on the power consumption model in QCA technology

the coupling strength between cells in coplanar systems is modeled for radius of 41nm. The QCA gate structure model is then constructed according to the locations of cells to classify existing coplanar five-input majority gates. By characterizing their performances

a new low-power five-input majority gate is proposed. Simulation results demonstrate that the proposed gate has lowest power consumption and performs better than other gates. To verify its properties in practical applications

a new coplanar QCA full adder is designed by means of MR Azghadi full adder

which has the best performance among similar adders.

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