Unlike the previous methods of realizing reversible finite state machine (FSM) by reconstructing FSM behavior

a circuit structure for reversible FSM realization is proposed in this paper. The circuit structure mainly includes two parts

one for next state and output calculation

the other for state preset

data sampling and storage. In the proposed reversible FSM

there is no complete reversible flip-flops such as JK

D and T

but their functions can be realized by the proposed reversible FSM. Furthermore

a synthesis method of reversible sequential circuits based on the proposed reversible FSM is presented and verified by an example. Compared with the synthesis methods of reversible finite state machine based on behavior reconstruction

the proposed synthesis method in this paper can avoid the solution of the inverse state machine of the original state machine and adding extra bits

which makes the synthesis process simpler.