Passive capacitor error averaging is an inherently linear capacitor mismatch calibration technique for pipelined analog-to-digital conversion

but its conversion speed is halved because of double sampling and double transferring.An improved capacitor error averaging technique is presented to make the conversion faster.The conversion speed is improved through the reduction of the number of the clock phases required for one conversion and the time allocated for one clock phase.Circuits analysis and MATLAB simulation indicate that the speed can be typically improved by more than 52% or 64% when the OTA is switched-capacitor common-mode feed back or not.The improved technique is ideal for applications of high-speed

high-resolution

and continuous operation.