清华大学微电子所,北京,100084
纸质出版:2007
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王为之, 靳东明, 张 洵. 基于CMOS模拟电路的高速模糊神经网络设计[J]. 电子学报, 2007,35(5):946-949.
WANG Wei-zhi, JIN Dong-ming, ZHANG Xun. Analog Circuits for High-Speed Complex Neural-Fuzzy Network[J]. Acta Electronica Sinica, 2007, 35(5): 946-949.
本文提出了可构成多规则模糊神经网络的CMOS模拟单元电路
包括:类Gauss型隶属度函数电路
电压求小电路和重心算法去模糊电路.基于这些电路设计了一个两输入/一输出、25条规则的控制系统
并通过非线性函数逼近进行了验证.所有单元均采用SMIC 0.18-μm CMOS数模混合工艺制造
芯片测试结果表明:提出的单元电路结构简单
输出电压偏差小
便于扩展和调节;因而适于实现多规则
自适应调节的高速高精度控制系统.
This paper proposes several improved CMOS analog circuits for neuro-fuzzy network
including Gaussian-like membership function circuit
minimization circuit
and a centroid algorithm defuzzier circuit without using division.A two-input/one-output neuro-fuzzy network composed of these circuits is implemented and testified for non-linear function approximating.All the circuits have been fabricated in SMIC 0.18- μ m CMOS technology.Experiment results show that all the proposed circuits provide characteristics of high operation capacity
high speed
and simple structures.They are very suitable for rapid implementation of high-speed complex neuro-fuzzy networks.
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