In this paper

we propose the cluster-based power management mechanism

which uses register cluster as the power management granularity.Specifically

the cluster-oriented compiler makes the register numbers in loops as continuous as possible to offer more opportunities for run-time power management

and the cluster-based run-time power manager employs a register cluster buffer to filter accesses to the register file for dynamic power saving.The dynamic voltage scaling and gated precharge circuits are also well utilized to reduce the leakage of bitcells and bitlines.Averagely

the total register file power is reduced by 44.7%.Compared with traditional approaches

the hardware/software co-design approach proposed in this paper achieves better power

area and delay tradeoffs for register files in embedded processors.