Currently the design data in a programmable chip is widely protected by block cipher

and the ciphertext is deciphered by a keyed circuit before the use of the data.Typically

the size of such a circuit is from 30 to 65 thousand gates

and the processing rate of it is from 3.0 to 3.7 Gigabits per second(Gbps).This paper proposes a 2-round multivariate cryptosystem.The algorithm of its decryption does not compose the constituent polynomial maps but only concatenates them.And with the processing rate from 7.76 to 13.6 Gbps

the decryption can be implemented by only about several or ten thousand gates.Because the decryption polynomials are encapsulated and disguised

most attacks against multivariate cryptosystems become inapplicable.And the new cryptosystem also resists the attacks that do not need to know the decryption polynomials

including the interpolation

linearization attack

side-channel attack

etc.