In-order microprocessors are increasingly adopted in a variety of multi-core chips due to their advantages in low power

low cost and high scalability.To further satisfy the performance requirement of single-thread applications

improving the load latency tolerance of in-order microprocessors is crucial.We propose an energy-efficient executing ahead mechanism which pre-executes the following instructions instead of stalling the processor when a long-latency cache miss occurs.This mechanism dynamically adjusts the executing ahead policy based on the prediction results of the performance benefit predictor to identify and eliminate the useless executing ahead periods.A confidence-based branch predictor is proposed for unresolvable branches during the useful executing ahead periods.Experimental results demonstrate that the performance is increased by 24.14% only with 4.31% energy overhead on average.Compared with two existing methods

the mechanism proposed in this paper decreases the energy consumption by 7.72% and 10.72% while achieving comparable performance enhancement

thus improves the energy-efficiency by 10.3% and 11.39%

respectively.