LIU Wen-song, ZHU En, WANG Jian, et al. Optimization Algorithm and VLSI Design of the Arithmetic Coder in JPEG2000[J]. Acta Electronica Sinica, 2011, 39(11): 2486-2491.
LIU Wen-song, ZHU En, WANG Jian, et al. Optimization Algorithm and VLSI Design of the Arithmetic Coder in JPEG2000[J]. Acta Electronica Sinica, 2011, 39(11): 2486-2491.DOI:
The algorithm and the hardware implementation of Arithmetic Coder (AC) in JPEG2000 are studied.A new kind of the sequence structure of the Renormalization Procedure (RP) is proposed.With the independent total-shift prediction procedure added
the current context can be processed serially by AC without loop computation.Based on the proposed algorithm
the 3-stage pipeline architecture with a slave pipeline is designed
where the pipeline is used to process the common situation of no byte-output and the slave pipeline is used to detect and process the byte-output situation separately
in order to reduce the critical path of the sub circuits.The synthesis result by the technology library of TSMC 0.18μm shows that the system clock frequency is 578MHz and the throughput is about 520 Msymbols/s.Comparing with the published works by the same technology library at home and abroad
they are optimized by 40% and 26% at least respectively.