1. 中国科学院上海微系统与信息技术研究所,上海,200050
2. 中国科学院大学,北京,100049
3. 中国科学院上海微系统与信息技术研究所,上海,200050
4. 中国科学院大学,北京,100049
纸质出版:2014
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宁文果, 朱春生, 李珩, 等. 掩膜电镀法制备圆片级封装重布线中孔洞形成机理研究[J]. 电子学报, 2014,42(2):411-416.
NING Wen-guo, ZHU Chun-sheng, LI Heng, et al. Study on the Void Formation in Through-Mask Plated Redistribution Layer in Wafer Level Package[J]. Acta Electronica Sinica, 2014, 42(2): 411-416.
在圆片级封装电镀铜重布线工艺中通常使用退火的方法促进铜晶粒生长、使电阻减小.而作为电镀铜种子层的溅射铜表面存在的微小裂纹通常会造成电镀液无法进入,从而使电镀铜和溅射铜界面出现孔铜,这类界面缺陷将影响后续高温退火过程中铜晶粒的生长,并导致电镀铜电阻增大.为研究此问题,本文尝试在电镀铜前轻微腐蚀溅射铜种子层,使裂纹尺寸变大,电镀液得以进入裂纹,并电镀填充裂纹形成无孔洞的电镀铜;此外若在电镀铜后在电镀铜表面溅射一层TaN层可限制高温下铜原子运动,使电镀铜经受300℃ 退火10分钟而不形成孔洞,高温退火同时可使得铜晶粒长大,电阻变小.
Thermal annealing is widely used to promote copper grain growth and reduce electrical resistance of the through-mask plated redistribution layer in wafer level package.However
the crack on the surface of the sputtered copper seed layer prevents the plating process in the crack and increases the electrical resistance
and results in void formation on the interface between the sputtered seed layer and the plated copper interconnects.To solve this problem
the sputtered seed layer was slightly etched before the electroplating process and a TaN layer was sputtered on the Cu interconnect surface before thermal annealing process.The process suppressed void formation during the electroplating process and the annealing process at 300℃.This process resulted in grain growth at elevated temperature and lower electrical resistance in the copper interconnects.
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