<FONT face=Verdana>In order to solve the high power consumption problem in the design of DOCSIS upstream transmitter

we proposed a new low power VLSI architecture for the design of upstream transmitter. By taking the symbol rate as the main performance constraint

the proposed architecture can scale the operating frequency of all circuit units included in the transmitter dynamically along with the changing of symbol rate on the upstream channel. In this way

the proposed architecture can achieve the optimized power consumption without losing any processing performance. Under different scenarios of symbol burst rates

the testing results show that the average power saving could be up to 67.13% after applying the proposed arch itecture. So far

the designed low power transmitter had been successfully integ rated in a CM (Cable Modem) SOC (System On Chip) platform with self-owned intellectual property rights

which supports the two-way digital cable TOD (TV-on-Demand)

and demonstrated excellent low power characteristics. Without loss of gener ality

the design architecture presented in this paper also can be applied to the design of other power-sensitive communication system. At the same time

it is worth to be trust that the proposed method will help to promote the development of the key low-power technology in the VLSI and SOC design.