A novel variable radix fast multiplication algorithm is presented. In the algorithm

redundant binary representation is adopted to carry out addition of two big numbers （512 bits or more）without carry propagation. The idea of variable radix fast multiplication is proposed. It makes the algorithm 33% more efficient than the radix-4 multiplication algorithm

and 11% more efficient than the radix-8 multiplication algorithm. Compared with the radix-8 multiplication algorithm

its hardware realization is simpler and it can overcome the radix-8 algorithm’s drawback that efficiency is seriously descended at worse and worst conditions. As a kernal

it is efficient for the hardware VLSI implementation for many public-key cryptosystems such as RSA cryptosystem.