This paper describes a design method of multi-stage transistor intermediate frequency wide band amplifier. The feature of design is the use of network synthesis technique for realizing the amplifier with Tschebyscheff or maximal flatness frequency characteristics. The amplifier itself consists of a cascade of RC neutralized common-emitter stages each with primary tuned interstage transformer. The discussion is divided into three parts. First

the neutralized common-emitter stage is represented by approximate unilateral equivalent circuit. Second

the interstage network is analyzed. Expressed the transistor amplifier power gain as a prescribed frequency function

it is possible to derive the limiting constraints for resonant frequencies and Q values of interstage networks

and subsequently to obtain values of circuit elements. These resonant frequencies of interstage networks are not tuned to the center frequency

but distributed at certain frequencies of the transmission band. Finally one design example is presented.