The feature size of CMOS technology is continuously shrinking

and the single event triple-node-upset induced by the charge sharing effect has become a research hotspot. This paper proposed a single event triple-node-upset self-recovery radiation-hardened latch: Hydra-DICE. The latch is arranged in an array structure based on 24 homogeneous cross-coupled elements (CCE). When a single event upset occurs at any three internal nodes concurrently

Hydra-DICE can realize the function of self-recovery to the correct logical value. Compared with the TNURL latch which has the equivalent triple-node-upset self-recovery capability

the Hydra-DICE latch has a 50% reduction in area overhead

a 48.28% reduction in delay

a 25.00% reduction in power consumption

and a 61.21% reduction in power consumption delay product. The simulation results show that the hardened latch has made a good compromise in fault tolerance performance

area overhead

delay and power.