基于线性无关矩阵的按需解锁硬件混淆方法

汪鹏君; 叶顺心; 张跃军; 张会红

doi:10.12263/DZXB.20210061

您当前的位置：

首页 >

文章列表页 >

基于线性无关矩阵的按需解锁硬件混淆方法

学术论文 | 更新时间：2025-12-11

- 基于线性无关矩阵的按需解锁硬件混淆方法
- Method of Unlock-on-Demand Hardware Obfuscation Based on Linear Independent Matrix
- 电子学报 2022年50卷第3期页码：703-709
- 作者机构：
  
  1.温州大学电气与电子工程学院，浙江温州 325035
  2.宁波大学信息科学与工程学院，浙江宁波 315211
- 作者简介：
  
  [ "汪鹏君男，1966年生，浙江宁波人.博士，教授，博士生导师，中国电子学会电路与系统委员会委员，中国人工智能学会理事，目前主要研究方向为集成电路设计、信息安全等技术及其相关理论.E-mail:wangpengjun@wzu.edu.cn" ]
  [ "叶顺心男，1995年生，浙江衢州人.宁波大学信息科学与工程学院硕士研究生，主要研究方向为硬件混淆安全设计.E-mail:502940763@qq.com" ]
- 基金信息：
  
  国家自然科学基金(61874078;61871244);国家重点研发计划“光电子与微电子器件及集成”重点专项子课题(2018YFB2202100);宁波市公益性计划项目(202002N3134)
- DOI：10.12263/DZXB.20210061
  中图分类号： TP331
- 收稿：2021-01-04，
  
  修回：2021-03-22，
  
  纸质出版：2022-03-25
- 稿件说明：
移动端阅览
汪鹏君,叶顺心,张跃军等.基于线性无关矩阵的按需解锁硬件混淆方法[J].电子学报,2022,50(03):703-709.

WANG Peng-jun,YE Shun-xin,ZHANG Yue-jun,et al.Method of Unlock-on-Demand Hardware Obfuscation Based on Linear Independent Matrix[J].ACTA ELECTRONICA SINICA,2022,50(03):703-709.
汪鹏君,叶顺心,张跃军等.基于线性无关矩阵的按需解锁硬件混淆方法[J].电子学报,2022,50(03):703-709. DOI： 10.12263/DZXB.20210061.

WANG Peng-jun,YE Shun-xin,ZHANG Yue-jun,et al.Method of Unlock-on-Demand Hardware Obfuscation Based on Linear Independent Matrix[J].ACTA ELECTRONICA SINICA,2022,50(03):703-709. DOI： 10.12263/DZXB.20210061.

摘要

硬件混淆是一种通过定向修改软核、固核或硬核的芯片保护方法，已成为当前芯片安全领域的研究热点.本文针对多个硬件IP（Intellectual Property）核按需解锁安全保护，提出一种基于线性无关矩阵的按需解锁硬件混淆方案.该方案首先利用线性无关矩阵算法，生成可隔离外部输入密钥与内部解锁信号的随机矩阵；然后采用冗余和黑洞状态组合混淆技术，对IP核进行加密；最后根据用户需求，通过矩阵乘运算实现按需解锁.在SMIC 65nm CMOS（Complementary Metal Oxide Semiconductor）工艺下，采用ITC（International Test Conference）基准电路和密码算法IP核实现硬件混淆.实验结果表明，所设计电路具有多IP核按需解锁功能，额外的面积和功耗开销均小于8%，且能有效防御寄存器翻转攻击、代码覆盖率攻击以及成员泄密攻击.

Abstract

Hardware obfuscation is a method of chip protection through targeted modification of soft core

solid core or hard core. It has become a research hotspot in the field of chip security. In order to unlock multiple hardware IP cores on demand and improve their security

an unlock-on-demand hardware obfuscation scheme based on the linear independent matrix is proposed in this paper. Firstly

by using the linear independent matrix algorithm

the scheme generates a randomized matrix to isolate the external input key and internal unlock signal. Secondly

it encrypts multiple IP cores based on a combination of redundant and black-hole states obfuscation technologies. Finally

according to users’ needs

it unlocks chip on demand through matrix multiplication. By using the SMIC 65 nm CMOS(Complementary Metal Oxide Semiconductor) process

the ITC(International Test Conference) reference circuit and encryption algorithm IP core are implemented for the proposed hardware obfuscation design. The experimental results have shown that the designed circuit has the advantages of unlock-on-demand

low additional area and power consumption (both less than 8%)

and effective defenses against code coverage attacks

关键词

Keywords

references

CHI M , XIAO D , CHANG R . Fast development of IC technologies in AI and IoT Era [C]// IEEE International Conference on Solid-State and Integrated Circuit Technology . Qingdao : IEEE , 2018 : 1 ‑ 4 .

白创 , 唐立军 . 一种可靠的芯片指纹PUF电路 [J]. 电子学报 , 2019 , 47 ( 10 ): 2116 ‑ 2125 .

BAI Chuang , TANG Li-jun . A reliable physical unclonable function for chip fingerprint [J]. Acta Electronica Sinica , 2019 , 47 ( 10 ): 2116 ‑ 2125 . (in Chinese)

SARKAR P , ROY D , SENGUPTA A , et al . Signature-free watermark for protecting digital signal processing cores used in CE devices [J]. IEEE Consumer Electronics Magazine , 2019 , 8 ( 1 ): 92 ‑ 94 .

YOUSRA A , FARINAZ K , MIODRAG P . Remote activation of ICs for piracy prevention and digital right management [C]// IEEE/ACM International Conference on Computer-Aided Design . San Jose CA : IEEE , 2007 : 674 ‑ 677 .

CHAKRABORTY R S , BHUNIA S . HARPOON: An obfuscation-based SoC design methodology for hardware protection [J]. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems , 2009 , 28 ( 10 ): 1493 ‑ 1502 .

CHAKRABORTY R S , BHUNIA S . RTL hardware IP protection using key-based control and data flow obfuscation [C]// International Conference on VLSI Design . Bangalore : IEEE , 2010 : 405 ‑ 410 .

ZHANG J , LIN Y , LYU Y , et al . A PUF-FSM binding scheme for FPGA IP protection and pay-per-device licensing [J]. IEEE Transactions on Information Forensics and Security , 2015 , 10 ( 6 ): 1137 ‑ 1150 .

ZHANG J . A practical logic obfuscation technique for hardware security [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems , 2016 , 24 ( 3 ): 1193 ‑ 1197 .

DOFE J , YU Q . Novel dynamic state-deflection method for gate-level design obfuscation [J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2018 , 37 ( 2 ): 273 ‑ 285 .

张跃军 , 王佳伟 , 潘钊 , 等 . 基于正交混淆的多硬件IP核安全防护设计 [J]. 电子与信息学报 , 2019 , 41 ( 8 ): 1847 ‑ 1854 .

ZHANG Yue-jun , WANG Jia-wei , PAN Zhao , et al . Hardware security for multi IPs protection based on orthogonal obfuscation [J]. Journal of Electronics and Information Technology , 2019 , 41 ( 8 ): 1847 ‑ 1854 . (in Chinese)

SUN P , CUI A . A new pay-per-use scheme for the protection of FPGA IP [C]// IEEE International Symposium on Circuits and Systems . Sapporo : IEEE , 2019 : 1 ‑ 5 .

GUHA K , SAHA D , CHAKRABARTI A . Blockchain technology enabled pay per use licensing approach for hardware IPs [C]// Design, Automation and Test in Europe Conference and Exhibition . Grenoble : DATE , 2020 : 1618 ‑ 1621 .

LI G , WANG P , QIAN H . Highly reliable multiport PUF circuit based on MOSFET zero temperature coefficient point [J]. Chinese Journal of Electronics , 2018 , 27 ( 4 ): 211 ‑ 216 .

杨轩 , 叶文强 , 崔小乐 . 基于RRAM延时单元的PUF设计 [J]. 电子学报 , 2020 , 48 ( 8 ): 1565 ‑ 1571 .

YANG Xuan , YE Wen-qiang , CUI Xiao-le . PUF design based on RRAM delay unit [J]. Acta Electronica Sinica , 2020 , 48 ( 8 ): 1565 ‑ 1571 . (in Chinese)

KOTESHWARA S , KIM C , PARHI K . Hierarchical functional obfuscation of integrated circuits using a mode-based approach [C]// IEEE International Symposium on Circuits and Systems . Baltimore : ISCAS , 2017 : 1 ‑ 4 .

KOTESHWARA S , KIM C , PARHI K . Key-based dynamic functional obfuscation of integrated circuits using sequentially triggered mode-based design [J]. IEEE Transactions on Information Forensics and Security , 2018 , 13 ( 1 ): 79 ‑ 93 .

浏览量

下载量

CSCD

文章被引用时，请邮件提醒。

提交

工具集

关联资源

基于探索式分区和测试向量生成的硬件木马检测方法