基于65 nm CMOS工艺的小型化高增益低噪声放大器设计

郭庆; 陈雨庭; 段宗明; 吴先良

doi:10.12263/DZXB.20211116

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基于65 nm CMOS工艺的小型化高增益低噪声放大器设计

学术论文 | 更新时间：2025-12-08

- 基于65 nm CMOS工艺的小型化高增益低噪声放大器设计
- Design of Miniaturized High-Gain Low Noise Amplifier Based on 65 nm CMOS Process
- 电子学报 2023年51卷第3期页码：593-600
- 作者机构：
  
  1.安徽大学电子信息工程学院, 安徽合肥 230000
  2.中国电子科技集团第三十八研究所，安徽合肥 230000
- 作者简介：
  
  [ "郭庆男， 1997年7月出生于安徽省亳州市，现为安徽大学电子信息工程学院在读硕士研究生，主要研究方向为射频电路设计. E-mail: 18712202602@163.com" ]
  [ "陈雨庭男，1990年6月出生于安徽省舒城县. 现为安徽大学电子信息工程学院在读博士研究生，研究方向为射频电路设计. E-mail: 334154923@qq.com" ]
  段宗明男， 1982年出生于安徽省安庆市. 博士，高级工程师. 主要研究方向为硅基射频与毫米波电路与系统设计. E-mail: duanzongm@163.com
  吴先良男，1955年出生于安徽省亳州市. 教授，博士生导师. 研究方向为电磁场理论、移动通信、复杂目标散射与逆散射理论、微波技术与天线、电磁场数值方法等领域. E-mail: xlwu@ahu.edu.cnxlwu@ahu.edu.cn
- 基金信息：
  
  国家自然科学基金(61871001;61971001)
- DOI：10.12263/DZXB.20211116
  中图分类号： TN402;TN722.3
- 收稿：2021-08-18，
  
  修回：2021-11-17，
  
  纸质出版：2023-03-25
- 稿件说明：
移动端阅览
郭庆,陈雨庭,段宗明等.基于65 nm CMOS工艺的小型化高增益低噪声放大器设计[J].电子学报,2023,51(03):593-600.

GUO Qing,CHEN Yu-ting,DUAN Zong-ming,et al.Design of Miniaturized High-Gain Low Noise Amplifier Based on 65 nm CMOS Process[J].ACTA ELECTRONICA SINICA,2023,51(03):593-600.
郭庆,陈雨庭,段宗明等.基于65 nm CMOS工艺的小型化高增益低噪声放大器设计[J].电子学报,2023,51(03):593-600. DOI： 10.12263/DZXB.20211116.

GUO Qing,CHEN Yu-ting,DUAN Zong-ming,et al.Design of Miniaturized High-Gain Low Noise Amplifier Based on 65 nm CMOS Process[J].ACTA ELECTRONICA SINICA,2023,51(03):593-600. DOI： 10.12263/DZXB.20211116.

摘要

基于65 nm 互补金属氧化物半导体（Complementary Metal Oxide Semiconductor，CMOS）工艺研制了一款用于X波段的小型化高增益低噪声放大器（Low Noise Amplifier，LNA）.通过研究晶体管尺寸和偏置电压对噪声系数和增益性能的影响，确定了低噪声高增益情况下晶体管尺寸和偏置电压的取值.针对LNA的输入、输出和级间匹配，采用变压器匹配网络，使得LNA尺寸缩小至0.33 mm×0.73 mm，同时提高了电路的隔离度.在变压器中嵌入并联电容，降低了变压器的耦合系数.基于差分共源拓扑结构，引入中和电容技术，有效地抑制了晶体管栅-漏间寄生电容引起的米勒效应，提高了LNA的增益和稳定性.测试结果表明，在1 V电源电压下，该LNA的带内最大增益为22.9 dB，最小噪声系数为2.8 dB，功耗为49 mW.在射频收发系统中，本款LNA具有良好的应用前景.

Abstract

An X-band miniaturized high-gain low noise amplifier (LNA) is developed based on 65 nm Complementary Metal Oxide Semiconductor (CMOS) process. By studying the influence of transistor size and bias voltage on noise figure and gain performance

the transistor size and bias voltage under low noise and high gain condition are determined. The transformer matching network is adopted for the input

output and inter-stage matching of LNA

which reduces the LNA size to 0.33 mm×0.73 mm and improves the circuit isolation. By embedding shunt capacitance in the transformer

the coupling coefficient of the transformer is reduced. Furthermore

based on the differential common source (CS) topology

the neutralization capacitance technology is introduced to effectively suppress the Miller effect caused by the parasitic capacitance between the gate and drain of the transistor

and improve the gain and stability of the LNA. The test results show that the maximum in-band gain of the LNA is 22.9 dB

the minimum noise figure is 2.8 dB and the power consumption is 49 mW at 1 V supply voltage. In the RF transmitter and receiver system

this LNA has a good application prospect.

关键词

Keywords

references

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