With the rapid ongoing development of wireless communication systems

and especially with the advent of the 5G era

bandpass filters (BPFs) are being used widely as frequency-selective devices in various systems. In recent years

the demand for communications has been increasing

causing the requirements for miniaturization of filters at low cost and with high performance to become the focus of research in the industry. The development of modern processing technology has provided various methods for BPF design

including microstrip BPF design using stepped impedance resonators

construction of a broadband BPF by using a complementary split-ring resonator as the basic resonant unit

and microstrip BPF design based on an E-shaped dual-mode resonator. However

these microstrip filters are relatively large in size

making it difficult to achieve the miniaturization goal. Lumped elements offer advantages that include small size

low cost

wide bandwidths

and low interaction between components

and these elements play an important role in radio-frequency (RF) device design. When compared with BPFs based on integrated passive device (IPD) technology and low-temperature co-fired ceramic (LTCC) processing

the single-layer wideband BPF presented here has lower production costs

reduced loss restrictions

and avoids the cost and manufacturing tolerance issues associated with surface mount devices. Because of its simple implementation using interdigital capacitors and microstrip inductors

the proposed filter also offers the advantages of simple processing and small device size.

Based on the single-layer printed circuit board (PCB) fabrication process

this paper proposes a novel high-selectivity wideband BPF. The circuit structure is symmetrical and comprises multiple groups of symmetrical series resonators that construct the passband and produce multiple zeros outside the passband. To enhance the stopband suppression ability and the frequency selectivity of this filter

multiple groups of grounded series resonators are added

which results in the addition of a transmission zero on each side of the passband. These two transmission zeros are controlled independently without affecting each other. The circuit is analyzed using the even-odd mode analysis method to solve for the transmission zeros and then provide analytical expressions for these transmission zeros. Subsequently

parameters such as the transmission zero frequency

the center frequency

the 3-dB fractional bandwidth

and the quality factor of the BPF are analyzed. To meet the requirements for miniaturization and low cost

all lumped elements shown in the schematic are implemented using interdigital capacitors and microstrip inductors. The interdigital capacitor has a multi-finger periodic structure with several geometric variables

including the lengths and widths of the fingers

the sizes of the gaps or spaces between the fingers

and the number of fingers used. These variables give each interdigital capacitor a high degree of freedom in its structure

while also increasing the structural optimization difficulty. Similarly

the inductance value of the microstrip inductor can be adjusted by varying the device length and width.

To demonstrate the validity of the proposed design method for this BPF

a prototype operating at 4.52 GHz is simulated

manufactured

and measured based on PCB technology

and the overall filter structure is optimized using Ansys HFSS software. The substrate used is the Rogers RO4350B

which has a relative dielectric constant of 3.66

a loss tangent of 0.003 7

and a thickness of 1.524 mm. Test results show that the 3 dB fractional bandwidth is 38.9%

with a minimum insertion loss of 1.68 dB at the center frequency of 4.52 GHz

a return loss of better than 21.45 dB

a harmonic suppression level greater than 19.6 dB within the range from 7.7 GHz to 9.4 GHz

and a group delay that varies between 0.56 ns and 1.2 ns within the passband.

This article presents a single-layer low-cost wideband BPF based on an even-odd mode circuit and analytical equations

and describes the design principles of the filter in detail. The filter uses interdigital capacitors and microstrip inductors as lumped elements to achieve miniaturization and low cost. Physical testing further validates the feasibility of the proposed filter

demonstrating its excellent performance

which includes small size

low loss

a wide bandwidth

and good selectivity. The filter is suitable for single-layer PCB processing and can be integrated easily with wireless communication systems.