绝缘体上硅功率半导体单芯片集成技术

张龙; 刘斯扬; 孙伟锋; 马杰; 盘成务; 何乃龙; 张森; 苏巍

doi:10.12263/DZXB.20220492

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绝缘体上硅功率半导体单芯片集成技术

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- 绝缘体上硅功率半导体单芯片集成技术
- Study on the Silicon-on-Insulator Power Semiconductor Monolithic Integration Technology
- 电子学报 2023年51卷第2期页码：514-526
- 作者机构：
  
  1.东南大学国家ASIC工程研究中心，江苏南京 210096
  2.华润上华科技有限公司，江苏无锡 214061
- 作者简介：
  
  [ "张龙男，1986年出生，江苏徐州人.2010年于中国矿业大学获学士学位，2013年于东南大学获硕士学位，2018年于东南大学获博士学位，2018至2020年于东南大学从事博士后工作.2020年至今为东南大学教师，副高级职称，博士生导师.主要研究方向为功率半导体集成工艺及器件.中国电子学会会员编号：E190022693S.E-mail: longzh@seu.edu.cn" ]
  [ "刘斯扬男，1987年出生，安徽合肥人.2008年于合肥工业大学获学士学位，2011年于东南大学获硕士学位，2015年于东南大学获博士学位，2015至2017年于东南大学从事博士后工作.目前为东南大学青年首席教授，国家高层次人才，博士生导师.主要研究方向为功率半导体集成工艺及器件.中国电子学会会员编号：E190029952M.E-mail: liusy2017@seu.edu.cn" ]
  [ "孙伟锋（通讯作者）男，1977年出生，江苏武进人.2000年、2003年、2007年于东南大学分别获得学士、硕士及博士学位.目前为东南大学首席教授，国家高层次人才，江苏特聘教授，博士生导师.主要研究方向为功率集成电路.中国电子学会会员编号：E190009272S.E-mail: swffrog@seu.edu.cn" ]
- 基金信息：
  
  国家自然科学基金(62274032;62174029);江苏省科技成果项目(BA2022005;BA2020027)
- DOI：10.12263/DZXB.20220492
  中图分类号： TN433;TN305
- 收稿：2022-05-05，
  
  修回：2022-11-07，
  
  纸质出版：2023-02-25
- 稿件说明：
移动端阅览
张龙,刘斯扬,孙伟锋等.绝缘体上硅功率半导体单芯片集成技术[J].电子学报,2023,51(02):514-526.

ZHANG Long,LIU Si-yang,SUN Wei-feng,et al.Study on the Silicon-on-Insulator Power Semiconductor Monolithic Integration Technology[J].ACTA ELECTRONICA SINICA,2023,51(02):514-526.
张龙,刘斯扬,孙伟锋等.绝缘体上硅功率半导体单芯片集成技术[J].电子学报,2023,51(02):514-526. DOI： 10.12263/DZXB.20220492.

ZHANG Long,LIU Si-yang,SUN Wei-feng,et al.Study on the Silicon-on-Insulator Power Semiconductor Monolithic Integration Technology[J].ACTA ELECTRONICA SINICA,2023,51(02):514-526. DOI： 10.12263/DZXB.20220492.

摘要

利用单芯片集成技术制造的智能功率芯片具有体积小、寄生小、损耗低等方面的优势，其技术难度远高于传统的多芯片、单封装形式的智能功率模块.本文首先介绍了单片智能功率芯片的架构与技术需求；然后，探讨了绝缘体上硅功率半导体单芯片集成的工艺流程和器件类型；接着，总结了高压横向IGBT器件技术、续流二极管器件技术、LDMOS器件技术的特征和效果；此外，还讨论了单片智能功率芯片的相关可靠性问题，包括高压互连线效应和低温雪崩不稳定.本课题组在功率半导体集成型器件的电流能力、关断速度、短路承受能力、反向恢复峰值电流、安全工作区、高压互连线屏蔽、低温可靠性等关键特性优化或可靠性提升方面进行了自主创新，构建了基于绝缘体上硅的功率半导体单芯片集成技术，并成功研制了单片智能功率芯片.

Abstract

The intelligent power chip designed and manufactured based on the single-chip integration technology has the advantages of small size

small parasitic element and low loss. Its technical difficulty is much higher than the intelligent power module with multiple co-packaged chips. Firstly

this paper introduces the block diagram of the single-chip intelligent power chip and its technical requirements. Then

the process flow and device types of the silicon-on-insulator (SOI) power semiconductor single-chip integration technology are discussed. Then

the features and technical effect of the high-voltage lateral IGBT

freewheeling diode and LDMOS technologies are summarized. Additionally

the reliability of single-chip intelligent power chip is discussed

including high-voltage interconnection effect and low-temperature instability. The research group of this paper has made independent innovation in the optimization or reliability improvement of key characteristics of integrated power semiconductor devices

such as current capability

turn-off speed

short-circuit withstand capability

reverse recovery peak current

safe operation area

high-voltage interconnection shielding

low-temperature reliability and so on. We developed the power semiconductor single-chip integration technology based on SOI

and realized the localization of single-chip intelligent power chip.

关键词

Keywords

references

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