The fault probability of the elementary gate

P

for the gate-level circuits' reliability estimation had been given based on expert experience generally.Considering the layout structure information

the size and defect characteristics of elementary gates

analyzing the defect size distribution under different defect models.The parameters

c

of the probability density distribution function of particle size under the corresponding models was calculated.Then the

P

-expression was derived.Theoretical analysis and experimental results with ISCAS85 benchmark and 74-series circuits show that the defect piecewise linear interpolation model can well describe the lower level real de

fect of circuit reliability model.The reliability results of ISCAS85 benchmark circuits obtained by the probabilistic transfer matrix method based on the proposed

P

model and by the reliability calculation method recommended by MIL-HDBK-217 standard were compared.It shows that the proposed

P

model is reasonable.