Fault-tolerant system of Reconfigurable Hardware (RH) with centralized controller has the shortcomings of complex reconfiguration algorithm and long reconstruction time

and the system will be invalidation when the controller is in fail.To realize online distributed fault-tolerant in-chip

a new RH architecture of cell arrays was proposed

which has the ability to achieve in-chip self-repairing.The method of fault localization and self-repairing for interconnection circuit between electronic cells in RH are described in detail.The electronic cell circuit and a Fault-Tolerant Switch Block (FT-SB) in RH are designed.The fault-tolerant method of interconnection circuit includes two stages.Firstly

the MUXs in FT-SB and the connection lines between FT-SBs in the fault channels are detected

then the re-routing and line-shift methods in interconnection circuit are introduced to heal the fault MUXs and the broken lines respectively.The implementation and simulation experiment of a 4-bit serial-parallel multiplier are presented.The performance analysis of fault-tolerant time and hardware resources consumption show that the fault-tolerant performance of the interconnection circuits in new RH is improved greatly.