Code-reuse attacks (CRAs) are difficult to detect and defend

especially on widely used x86 processors.One reason is that lots of unintended but legal instructions exist in x86 binary codes.The unintended instructions make the finding of so called gadgets for CRAs is much easier than that of RISC processors.Previous studies rely on software-only means to tackle the unintended instruction problem

which makes their approaches are either very costly or can only be applied under restricted conditions.In this paper

we propose a hardware/software co-design approach to tackle the unintended instruction problem.The proposed mechanism has little performance impact on the examined SPEC CPU 2006 benchmarks.We also propose using hardware control-flow locking as a complementary technique.By using the two techniques together

an attacker will have little chance to carry out CRAs on x86 processors.