Technology scaling results in that chip failure caused by single event transient pulses is becoming more and more serious.In order to accurately compute the failure rates introduced by the transient pulses impacting on latches

a novel latching-window masking model considering overlapped transient pulses in multi-cycle is proposed.Firstly

sensitized paths and delays are calculated by the proposed re-convergence aware sensitized path searching algorithm.Further

on re-convergence paths

pulses are overlapped by the proposed pulse overlapping calculation technique.Finally

as regards transient pulses arriving at latches

failure rates are computed by the proposed latching-window masking model.The proposed technique can accurately compute re-convergence induced pulse overlap and it is suitable to estimate failure rates considering multi-cycle.Experimental results for ISCAS'85 benchmarks show that

compared with the approach which has not considered pulse overlap in multi-cycle

the proposed technique improves 7.5% soft error rate accuracy on average with only less than twice the simulation time overhead.