信息工程大学,河南,郑州,450001
网络出版:2017-12-25,
纸质出版:2017
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朱玉飞, 戴紫彬, 徐进辉, 等. 流体系结构密码处理器存储系统的研究与设计[J]. 电子学报, 2017,45(12):2957-2964.
ZHU Yu-fei, DAI Zi-bin, XU Jin-hui, et al. Research and Design of Memory System of Stream Architecture Cryptography Processor[J]. Acta Electronica Sinica, 2017, 45(12): 2957-2964.
朱玉飞, 戴紫彬, 徐进辉, 等. 流体系结构密码处理器存储系统的研究与设计[J]. 电子学报, 2017,45(12):2957-2964. DOI: 10.3969/j.issn.0372-2112.2017.12.018.
ZHU Yu-fei, DAI Zi-bin, XU Jin-hui, et al. Research and Design of Memory System of Stream Architecture Cryptography Processor[J]. Acta Electronica Sinica, 2017, 45(12): 2957-2964. DOI: 10.3969/j.issn.0372-2112.2017.12.018.
以信息安全设备的密码应用需求为基础,融合流体系结构处理器基本架构,设计出流体系结构密码处理器.文章主要研究和设计影响该处理器性能的瓶颈流存储系统.此系统针对专用密码处理器的存储特点,并采用可配置化设计,满足密码应用对处理器存储系统灵活高效的要求.同时,该设计将层次化-分布-分体式存储、多数据通道流水并行化访存、流访存调度策略相结合,优化存储系统的访存效率,以提高该处理器的整体性能.研究结果表明,相比于典型密码处理器的存储设计,该设计的访存效率最高可提升约6倍.
The design of stream architecture cryptography processor bases on the need of cryptography applications for information security equipment and fuses the basic structure of stream architecture processors.The paper basically researches and designs stream memory system which is a bottleneck that affects the processor's performance.The system aims at memory characteristics of the dedicated cryptography processor and takes reconfigurable design to satisfy cryptography applications' flexible and efficient requirements on the processor's memory system.Meanwhile
the design combines hierarchical-distributed-banked memory、parallel stream access of channels and stream access dispatcher strategy together
which optimizes memory access efficiency of the system to improve the whole performance of the processor.Research results demonstrate that comparing with the memory design of typical cryptography processors
memory access efficiency of this design can be highly raised to 6 times.
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