Design reuse is an important means to increase the productivity of analog and mixed-siganl IC designs. A

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based resizing methodology for CMOS OpAmp's is proposed in this paper.The basic idea is to preserve the

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parameters of some crucial transistors in the circuit with the aim of the approximate performance preservation of the resized circuit. The method to accurately match the

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parameters based on the BSIM like model between the resized and the original circuit is presented. The resizing experiments of a two-stage Miller compensated OpAmp and a folded cascode OpAmp for the process migration from a 0.35 μm CMOS technology to a 0.18 μm

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90nm one have been performed to validate the proposed method. The simulation results show that the method generates the resized circuits with almost the same performance but reduced power and area consumption at a lower computational cost compared with the existing approaches.