电子学报 ›› 2021, Vol. 49 ›› Issue (2): 275-285.DOI: 10.12263/DZXB.20180572

• 学术论文 • 上一篇    下一篇

三值光学计算机中SJ-MSD加法器的设计与实现

江家宝1,2, 张晓峰3, 沈云付1, 欧阳山1, 周时强1, 彭俊杰1, 刘跃军1, 金翊1   

  1. 1. 上海大学计算机科学与工程学院, 上海 200444;
    2. 巢湖学院信息工程学院, 安徽巢湖 238000;
    3. 中国航天科学与工业集团第25 研究所毫米波遥感技术国家重点实验室, 北京 100039
  • 收稿日期:2018-06-20 修回日期:2019-04-26 出版日期:2021-02-25
    • 通讯作者:
    • 金翊
    • 作者简介:
    • 江家宝 男,1968年生于安徽无为,副教授,现在上海大学计算机工程与科学学院攻读博士学位.主要研究方向为三值光学计算机和嵌入式系E-mail:jjb15820109@163.com;张晓峰 男,1979年生于湖北襄阳,教授,863专家组成员,2005年在哈工大获博士学位.现在中国航天科学与工业集团第25研究所工作.主要研究方向为精确制导和毫米工程;沈云付 男,1960年生于浙江平湖,博士,教授,现在上海大学工作.主要研究方向为软件形式化、模型检验、计算技术、三值光学计算机及其可靠性.
    • 基金资助:
    • 安徽省教育厅自然科学基金 (No.KJ2017A452); 上海市科研计划专项基金 (No.15700500400); 国家自然科学基金 (No.61572305,No.61073049)

Design and Implementation of SJ-MSD Adder in Ternary Optical Computer

JIANG Jia-bao1,2, ZHANG Xiao-feng3, SHEN Yun-fu1, OUYANG Shan1, ZHOU Shi-qiang1, PENG Jun-jie1, LIU Yue-jun1, JIN Yi1   

  1. 1. School of Computer Engineering and Science, University of Shanghai, Shanghai 200444, China;
    2. College of Information Engineering, University of Chaohu, Chaohu, Anhui 238000, China;
    3. State Key Laboratory of Millimeter Wave Remote Sensing Technology, 25 th Institute of China Aerospace Science and Industry Group, Beijing 100039, China
  • Received:2018-06-20 Revised:2019-04-26 Online:2021-02-25 Published:2021-02-25
    • Corresponding author:
    • JIN Yi
    • Supported by:
    • Natural Science Foundation of Education Department of Anhui Province (No.KJ2017A452); Special Fund for Research Project of Shanghai Municipality (No.15700500400); National Natural Science Foundation of China (No.61572305, No.61073049)

摘要: 本文介绍三值光学计算机的一种新型并行加法器—SJ-MSD加法器的设计与实现.介绍判断一组三值逻辑变换能够实现并行无连续进位二进制MSD数加法的充分条件(沈氏充分性定理).给出了构成SJ-MSD加法器的五个三值逻辑变换:S1、S2、J1、J2和J3(简称SJ变换),及其操作规则(简称SJ规则),并依据沈氏充分性定理推证了SJ变换和SJ规则构成MSD并行加法器的可靠性.尔后又详细阐述了SJ-MSD加法器在三值光学计算机原型系统SD16上的设计方案和实现方法,并阐述了流水计算和多数据共享SJ-MSD加法器的实现方法.文中最后详细介绍了对SJ-MSD加法器的测试实验.与先期的TW-MSD加法器相比,SJ-MSD加法器减少占用处理器位数约25%,有效提高了三值光学处理器的使用率.

关键词: 三值光学计算机, 重构, 像素, 处理器位, 共享流水加法器

Abstract: In this paper the design and implementation of a new parallel adder, SJ-MSD adder, in a ternary optical computer (i.e.TOC) are proposed. It is introduced that a sufficient conditions (Shen's sufficient theorem) which judging that a group of ternary logical transformations is able to build a MSD (Modified Signed Digit) addition. Five logical transformations S1,S2,J1,J2 and J3 (i.e.SJ transformation) and a parallel carry-free MSD addition rule (i.e.SJ rule) are proposed to construct SJ-MSD adder. Meanwhile according to Shen's sufficient theorem, the reliability of the SJ transformation and SJ rule used to construct MSD parallel adder is proved. Subsequently, in the ternary optical computer prototype system SD16, the design and implement of SJ-MSD adder are discussed in detail. At the same time the implementation methods of pipeline addition and sharing one SJ-MSD adder for multiple data are expatiated. Some experiments of SJ-MSD adder is introduced. Compared with the previous TW-MSD adder, the SJ-MSD adder occupies processor bits less about 25%. So the optical processor’ efficiency is effectively improved.

Key words: TOC(ternary optical computer), reconfiguration, pixel, processor bit, shareable pipelined adder

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