结合结构特征基于测试集重排序的故障诊断方法

doi:10.12263/DZXB.20200399

电子学报 ›› 2022, Vol. 50 ›› Issue (1): 63-71.DOI: 10.12263/DZXB.20200399

所属专题：长摘要论文

结合结构特征基于测试集重排序的故障诊断方法

欧阳丹彤¹^,³, 刘扬², 宋金彩², 王浩然⁴, 张立明¹^,³

^1.吉林大学计算机科学与技术学院，吉林长春 130012
^2.吉林大学软件学院，吉林长春 130012
^3.符号计算与知识工程教育部重点实验室（吉林大学），吉林长春 130012
^4.中国科学院大学计算机科学与技术学院，北京 100000

收稿日期:2020-04-27 修回日期:2021-01-04 出版日期:2022-01-25
- 作者简介:
- 欧阳丹彤女，1968年出生于吉林省长春市.1998年毕业于吉林大学计算机科学系并获博士学位.教授、博士生导师.主要研究方向为自动推理与基于模型诊断. E-mail:ouyd@jlu.edu.cn
  刘扬男，1994年出生于内蒙古自治区巴彦淖尔市.2020年毕业于吉林大学软件学院并获硕士学位.主要研究方向为基于模型诊断和测试诊断. E-mail:ly2020@jlu.edu.cn
  张立明（通信作者）男，1980年出生于吉林省榆树市.吉林大学博士.主要研究方向为基于模型诊断、可满足性问题和测试诊断. E-mail:limingzhang@jlu.edu.cn
- 基金资助:
- 国家自然科学基金 (62076108)

Fault Diagnosis Method Based on Test Set Reordering Combined with Structural Features

OUYANG Dan-tong¹^,³, LIU Yang², SONG Jin-cai², WANG Hao-ran⁴, ZHANG Li-ming¹^,³

^1.College of Computer Science and Technology, Jilin University, Changchun, Jilin 130012, China
^2.Software Institute, Jilin University, Changchun, Jilin 130012, China
^3.Key Laboratory of Symbolic Computation and Knowledge Engineering（Jilin University）, Ministry of Education, Changchun, Jilin 130012, China
^4.School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing 100000, China

Received:2020-04-27 Revised:2021-01-04 Online:2022-01-25 Published:2022-01-25
- Supported by:
- National Natural Science Foundation of China (62076108)

摘要/Abstract

摘要：

故障诊断是集成电路领域中的重要研究方向，基于测试激励集方法求解候选故障诊断是目前较为高效的诊断方法，而GTreord是目前具有较高诊断准确性的方法.在对GTreord方法深入研究的基础上，本文依据测试激励与候选故障诊断解之间的结构特征，通过分析电路故障输出响应，提出结合结构特征的测试激励集重排序的候选诊断（Reordering Test Default Diagnosis，RTDD）方法.根据测试激励对生成候选故障诊断解集合的影响程度的不同，提出测试分数概念；通过比较电路的实际故障输出响应、无故障输出响应、模型故障输出响应，计算出测试激励的测试分数.测试激励集依据测试分数进行重排序，并将重排序后的测试激励集用于故障诊断.实验结果表明，与GTreord方法相比，RTDD方法提高了测试激励集重排序的效率，求解时间提高1~4个数量级；此外，在保障同样诊断准确性的情况下，RTDD方法有效减少了所需测试的激励个数.

长摘要
随着现代半导体工业的迅猛发展，如今集成电路已经发展到由数十亿个晶体管组成的规模。电路的规模不断增大但电路尺寸却不断缩小，使得电路故障检测与诊断的难度和成本也随之不断增加。为了解决故障诊断效率相对低下的问题，本文研究如何能够快速、有效地诊断出电路中发生的故障。故障诊断是集成电路领域中的重要研究方向，基于测试激励集方法求解候选故障诊断是目前较为高效的诊断方法，而GTreord是目前具有较高诊断准确性的方法.在对GTreord方法深入研究的基础上，本文依据测试激励与候选故障诊断解之间的结构特征，通过分析电路故障输出响应，提出结合结构特征的测试激励集重排序的候选诊断（Reor⁃dering Test Default Diagnosis，RTDD）方法.根据测试激励对生成候选故障诊断解集合的影响程度的不同，提出测试分数概念；通过比较电路的实际故障输出响应、无故障输出响应、模型故障输出响应，计算出测试激励的测试分数.测试激励集依据测试分数进行重排序，并将重排序后的测试激励集用于故障诊断.实验结果表明，与GTreord方法相比，RTDD方法提高了测试激励集重排序的效率，求解时间提高1~4个数量级；此外，在保障同样诊断准确性的情况下，RTDD方法有效减少了所需测试的激励个数.

关键词: 故障诊断, 测试分数, 测试激励集重排序

Abstract:

Fault diagnosis is a main direction in the research of integrated circuits which can solve candidate fault diagnosis based on test sets effectively. GTreord is a method with the best diagnostic accuracy currently. Based on deep analysis of the GTreord method, in this paper, a candidate diagnosis solution method based on test set reordering is proposed, referred as RTDD. RTDD method is based on the structural characteristics between the test and the candidate fault diagnosis solutions and analyzes the circuit fault output response. According to the different influence degrees of test on the generation of candidate fault diagnosis solution set, the notion of test score is presented. By comparing the actual fault output response, non-fault output response and model fault output response of the circuit, the test score of the test is obtained. The test set is reordered according to the test score, and the reordered test is applied to the fault diagnosis. Compared with the GTreord method, the experiments show that RTDD method improves the efficiency of test set reordering, and the running time is improved by 1-4 orders of magnitude. In addition, RTDD method effectively reduces the number of required test under the same diagnostic accuracy.

Extended Abstract
With the rapid development of the modern semiconductor industry, integrated circuits have now grown to the scale of billions of transistors. The scale of the circuit continues to increase, while the size of it continues to shrink, which makes it more difficult to detect fault and form diagnosis with higher cost. In order to solve the problem of relatively low efficiency of fault diagnosis, this paper focuses on how to diagnose faults in circuits quickly and effectively. Fault diagnosis is an important research direction in the field of integrated circuits which can solve candidate fault diagnosis based on test sets effectively. GTreord is a method with the highest diagnostic accuracy so far. Based on the structural characteristics between test excitation and candidate fault diagnosis solutions, this paper proposes a candidate diagnosis named RTDD of reordering test excitation sets combined with structural characteristics by analyzing the circuit fault output response. According to the different influence degrees of test on the generation of candidate fault diagnosis solution set, the concept of test score is presented. By comparing the actual fault output response, non-fault output response and model fault output response of the circuit, the test score of the test is calculated and obtained. The test set is reordered according to the test score, and the reordered test is applied to the fault diagnosis. Compared with the GTreord method, results of the experiment show that RTDD method improves the efficiency of test set reordering, and the running time is improved by 1-4 orders of magnitude. In addition, RTDD method effectively reduces the number of required tests with the same diagnostic accuracy.

Key words: fault diagnosis, test score, test set reordering

中图分类号:

TP391

欧阳丹彤, 刘扬, 宋金彩, 等. 结合结构特征基于测试集重排序的故障诊断方法[J]. 电子学报, 2022, 50(1): 63-71.

Dan-tong OUYANG, Yang LIU, Jin-cai SONG, et al. Fault Diagnosis Method Based on Test Set Reordering Combined with Structural Features[J]. Acta Electronica Sinica, 2022, 50(1): 63-71.

图/表 8

图1 GTreord方法测试激励删除过程

图2 GTreord方法部分T(sub,k)

图3 GTreord方法测试激励集重排序结果

表1 c17部分Rk和Robs对照表

$t i$	$R f f$	$R o b s$	$R 0$	$R 1$	$R 2$
$t 0$ = 10100	10	00	00	10	10
$t 1$ = 00110	00	00	00	10	00
$t 2$ = 10111	00	00	00	10	10
$t 3$ = 11011	11	11	11	11	01
$t 4$ = 00011	01	01	01	01	01
$t 5$ = 10001	01	01	01	01	01
$t 6$ = 11101	11	11	11	11	11

表1 c17部分Rk和Robs对照表

$t i$	$R f f$	$R o b s$	$R 0$	$R 1$	$R 2$
$t 0$ = 10100	10	00	00	10	10
$t 1$ = 00110	00	00	00	10	00
$t 2$ = 10111	00	00	00	10	10
$t 3$ = 11011	11	11	11	11	01
$t 4$ = 00011	01	01	01	01	01
$t 5$ = 10001	01	01	01	01	01
$t 6$ = 11101	11	11	11	11	11

图4 c17实例RTreord，RTcover

表2 ISCAS-85实例测试激励集重排序结果

Circuit Name	F_num	T_num	DD_time		R_test	G_test
Circuit Name	F_num	T_num	RTDD	GTreord	R_test	G_test
c17	14	7	14	112	57.1%	71.4%
c432	86	23	86	2064	65.2%	60.9%
c499	146	16	146	2482	75.0%	81.3%
c880	165	22	165	3795	72.7%	72.7%
c1355	146	15	146	2336	66.7%	66.7%
c1908	116	14	116	1740	50.0%	57.1%
c2670	589	48	589	28861	60.4%	62.5%
c3540	144	36	144	5328	63.9%	61.1%
c5315	596	38	596	23244	65.8%	68.4%
c6288	128	8	128	1152	75.0%	62.5%

表3 ISCAS-89实例测试激励集重排序结果

Circuit Name	F_num	T_num	DD_time		R_test	G_test
Circuit Name	F_num	T_num	RTDD	GTreord	R_test	G_test
s27	32	10	32	352	70.0%	70.0%
s208_1	217	46	217	10199	69.6%	73.9%
s298	308	43	308	13552	58.1%	55.8%
s344	342	35	342	12312	48.6%	51.4%
s349	350	36	350	12950	77.8%	75.0%
s382	399	44	399	17955	68.2%	75.0%
s386	384	84	384	32640	72.6%	71.4%
s400	424	48	424	20776	62.5%	66.7%
s420	430	73	430	31820	56.2%	60.3%
s420_1	455	89	455	40950	56.2%	60.7%
s444	474	44	474	21330	65.9%	63.6%
s510	564	69	564	39480	71.0%	73.9%
s526	555	83	555	46620	75.9%	80.7%
s526n	553	78	553	43687	74.4%	70.5%
s641	463	84	463	39355	71.4%	72.6%
s713	581	84	581	49385	73.8%	75.0%
s820	850	138	850	118150	59.4%	61.6%
s832	870	142	870	124410	69.0%	68.3%
s838	857	128	857	110553	72.7%	74.2%
s838_1	931	186	931	174097	72.6%	80.1%
s953	1033	114	1033	118795	62.3%	61.4%
s1196	1240	189	1240	235600	73.0%	76.7%
s1238	1353	197	1353	267894	84.8%	84.8%
s1423	1515	107	1515	163620	67.3%	74.8%
s1488	1486	172	1486	257078	70.3%	75.6%
s1494	1506	168	1506	254514	68.5%	71.4%
s5378	4551	336	4551	1533687	65.2%	68.3%
s35932	39094	80	39094	3166614	74.5%	73.1%
s38417	30900	1050	30900	27737020	63.9%	66.0%
S38584	36299	763	36299	27732436	67.7%	68.4%

表4 RTDD方法测试激励集重排序过程时间对比

Circuit Name	r_time	d_time	Circuit name	r_time	d_time
c17	0.001	0.002	s444	0.083	21.524
c432	0.018	0.117	s510	0.092	18.364
c499	0.022	1.037	s526	0.172	59.765
c880	0.025	1.475	s526n	0.158	51.779
c1355	0.035	1.101	s641	0.090	72.297
c1908	0.014	0.407	s713	0.357	115.160
c2670	0.104	60.708	s820	0.615	228.971
c3540	0.047	1.321	s832	0.798	216.724
c5315	0.199	180.798	s838	0.143	306.586
c6288	0.015	0.548	s838_1	0.398	454.973
s27	0.002	0.051	s953	0.266	334.309
s208_1	0.024	1.246	s1196	0.462	819.920
s298	0.089	6.085	s1238	1.013	1023.137
s344	0.031	8.524	s1423	0.985	1769.468
s349	0.085	9.849	s1488	1.549	803.337
s382	0.116	15.286	s1494	1.429	857.503
s386	0.164	12.189	s5378	8.676	5320.265
s400	0.148	18.623	s35932	17.632	10658.890
s420	0.090	20.202	s38417	152.733	93450.989
s420_1	0.070	20.836	S38584	152.691	93455.521

参考文献 19

1	LIUM, OUYANGD T, CAIS W, et al. Efficient zonal diagnosis with maximum satisfiability[J]. Science China Information Sciences, 2018, 61(11): 1-14.
2	LIUM, OUYANGD T, ZHANGL M. A novel approach for improving quality of health state with difference degree in circuit diagnosis[J]. Applied Intelligence, 2018, 48(11): 4371-4381.
3	刘梦, 欧阳丹彤, 刘伯文, 等. 结合问题特征的分组式诊断方法[J]. 电子学报, 2018, 46(3): 589-594.
	LIUM, OUYANGD T, LIUB W, et al. Grouped diagnosis approach using the feature of problem[J]. Acta Electronica Sinica, 2018, 46(3): 589-594. (in Chinese)
4	WANGY Y, LIR Z, ZHOUY P, et al. A path cost-based GRASP for minimum independent dominating set problem[J]. Neural Computing and Applications, 2017, 28(1): 143-151.
5	欧阳丹彤, 刘伯文, 刘梦, 等. 结合电路结构基于分块的诊断方法[J]. 电子学报, 2018, 46(7): 1571-1577.
	OUYANGD T, LIUB W, LIUM, et al. A block-based diagnostic method combining with the circuit structure[J]. Acta Electronica Sinica, 2018, 46(7): 1571-1577. (in Chinese)
6	ZHANW F, EL-MALEHA. A new scheme of test data compression based on equal-Run-length coding (ERLC)[J]. Integration, 2012, 45(1): 91-98.
7	詹文法, 邵志伟. 一种集成电路测试流程分级动态调整方法[J]. 电子学报, 2020, 48(8): 1623-1630.
	ZHANW F, SHAOZ W. Hierarchical dynamic adjustment method for integrated circuit testing process[J]. Acta Electronica Sinica, 2020, 48(8): 1623-1630. (in Chinese)
8	倪天明, 常郝, 卞景昌, 等. 基于边沿延时翻转的绑定前硅通孔测试方法[J]. 电子学报, 2019, 47(11): 2278-2283.
	NIT M, CHANGH, BIANJ C, et al. An edge transition delay based pre-bond TSV testing method[J]. Acta Electronica Sinica, 2019, 47(11): 2278-2283. (in Chinese)
9	POMERANZI. OBO: An output-by-output scoring algorithm for fault diagnosis[C]//2014 IEEE Computer Society Annual Symposium on VLSI. Tampa, USA: IEEE, 2014: 314-319.
10	POMERANZI. Improving the accuracy of defect diagnosis by considering fewer tests[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2014, 33(12): 2010-2014.
11	POMERANZI. Improving the accuracy of defect diagnosis by adding and removing tests[J]. IET Computers & Digital Techniques, 2015, 10(2): 47-53.
12	BERNARDIP, GROSSOM, REBAUDENGOM, et al. A pattern ordering algorithm for reducing the size of fault dictionaries[C]//The 24th IEEE VLSI Test Symposium. NY, USA: IEEE, 2006: 386-391.
13	BOLCHINIC, QUINTARELLIE, SALICEF, et al. A data mining approach to incremental adaptive functional diagnosis[C]//2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS). NY, USA: IEEE, 2013: 13-18.
14	HUANGY, CHENGW T, TAMARAPALLIN, et al. Diagnosis with limited failure information[C]//2006 IEEE International Test Conference. Santa Clara, CA, USA: IEEE, 2006: 1-10.
15	XUEC, BLANTONR D. Test-set reordering for improving diagnosability[C]//2017 IEEE 35th VLSI Test Symposium (VTS). NY, USA: IEEE, 2017: 1-6.
16	BODHES, AMYEENM E, POMERANZI, et al. Diagnostic fail data minimization using an N-cover algorithm[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24(3): 1198-1202.
17	BODHES, POMERANZI, AMYEENM E, et al. Reordering tests for efficient fail data collection and tester time reduction[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25(4): 1497-1505.
18	BRGLEZE, FUJIWARAH. A neutral netllst of 10 combinational benchmark circuits and a target translator in fortran[C]//Proceedings of IEEE International Symposium on Circuits and Systems. Kyoto, USA: IEEE, 1985: 695-698.
19	BRGLEZF, BRYAND, KOZMINSKIK. Combinational profiles of sequential benchmark circuits[C]//IEEE International Symposium on Circuits and Systems. Portland, USA: IEEE, 1989: 1929-1934.

[1]	曹源, 宋迪, 胡小溪, 孙永奎. 基于改进时域多尺度散布熵与支持向量机的转辙机故障诊断[J]. 电子学报, 2023, 51(1): 117-127.
[2]	于建立, 吴传斌, 冷赫, 鲁志伟. 基于磁场分布特性的接地网故障诊断研究[J]. 电子学报, 2022, 50(3): 598-607.
[3]	鲍中新, 文成林, 马雪. 一种基于数据变化率的预处理及主元分析故障诊断方法[J]. 电子学报, 2021, 49(11): 2234-2240.
[4]	张彩霞, 王子涵, 文成林, 刘国文, 余伟. 样本空间基于多级高维特征表示的微小故障诊断[J]. 电子学报, 2020, 48(8): 1647-1654.
[5]	郑近德, 潘海洋, 童靳于, 刘庆运, 丁克勤. 自适应掩膜信号集成局部特征尺度分解及其应用[J]. 电子学报, 2020, 48(10): 2060-2070.
[6]	郑近德, 潘海洋, 戚晓利, 张兴权, 刘庆运. 基于改进经验小波变换的时频分析方法及其在滚动轴承故障诊断中的应用[J]. 电子学报, 2018, 46(2): 358-364.
[7]	苏维均, 杨飞, 于重重, 程晓卿, 崔世杰. 基于局部频谱的滚动轴承故障特征提取方法[J]. 电子学报, 2018, 46(1): 160-166.
[8]	潘海洋, 郑近德, 杨宇, 童宝宏. 基于CELCD和MFVPMCD的智能故障诊断方法研究[J]. 电子学报, 2017, 45(3): 546-551.
[9]	刘荣胜, 彭敏放, 肖祥慧. 基于谱聚类集成的变压器在线故障诊断[J]. 电子学报, 2017, 45(10): 2491-2497.
[10]	张伟, 周维佳, 刘晓源. 基于扩展LLE方法的非线性系统故障诊断研究[J]. 电子学报, 2015, 43(9): 1810-1815.
[11]	张玲霞, 刘志仓, 王辉, 齐会云, 胡旦. 非线性系统故障诊断的粒子滤波方法[J]. 电子学报, 2015, 43(3): 615-619.
[12]	郭晨, 梁家荣, 冷明. 基于PMC模型的条件故障诊断[J]. 电子学报, 2015, 43(11): 2331-2337.
[13]	宣恒农, 张润驰, 左苗, 刘田田. 面向数据中心网络的分层式故障诊断算法[J]. 电子学报, 2014, 42(12): 2536-2542.
[14]	黄江涛;;王明辉;李武劲;古博. 基于动态权值的多分类器故障诊断系统[J]. 电子学报, 2012, 40(4): 734-738.
[15]	罗慧;王友仁;林华;姜媛媛. 任意周期激励函数的模拟电路测试激励优化设计[J]. 电子学报, 2011, 39(8): 1950-1954.

结合结构特征基于测试集重排序的故障诊断方法

Fault Diagnosis Method Based on Test Set Reordering Combined with Structural Features

RichHTML

PDF

可视化

摘要/Abstract

引用本文

使用本文

图/表 8

参考文献 19

相关文章 15

编辑推荐

Metrics