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一种新型低功耗异步比较器的设计方法

姜小波, 叶德盛   

  1. 华南理工大学电子与信息学院, 广东广州 510641
  • 收稿日期:2011-12-27 修回日期:2012-05-11 出版日期:2012-08-25
    • 作者简介:
    • 姜小波 男,1972年11月生于浙江江山.分别于1994年和1997年在浙江大学获得学士和硕士学位.2004年从中科院微电子所获得博士学位.目前在华南理工大学电子信息学院担任副教授.主要研究方向为差错控制编码设计、低功耗集成电路设计、通信基带芯片设计. E-mail:xbjiang@gmail.com 叶德盛 男,1988年1月生于广东广州.2010年毕业于中山大学理工学院微电子学专业.2010年起进入华南理工大学电子与信息学院,就读研究生.主要从事异步LDPC解码器的设计等方向的研究. E-mail:ydsbanban@163.com
    • 基金资助:
    • 国家自然科学基金 (No.60976031); 广东省科技厅 (No.2009B080701060,No.2010A080402015); 中央高校基本科研业务 (No.2009ZM0310)

A New Design Methodology of Low Power Asynchronous Comparator

JIANG Xiao-bo, YE De-sheng   

  1. School of Electronic and Information Engineering, South China University of Technology, Guangzhou, Guangdong 510641, China
  • Received:2011-12-27 Revised:2012-05-11 Online:2012-08-25 Published:2012-08-25
    • Supported by:
    • National Natural Science Foundation of China (No.60976031); Department of Science and Technology of Guangdong Province (No.2009B080701060, No.2010A080402015); Fundamental Research Funds for the Central Universities (No.2009ZM0310)

摘要: 本文利用输入数据的统计特性,设计了两种低功耗异步比较器——异步行波比较器和提前终止异步比较器.异步行波比较器从第一个不相等的数位开始停止运算,但要把结果传到最低位,消耗部分功耗.提前终止异步比较器通过修改真值表,基于新的比较单元电路和终止判断电路,在第一个不相等的数位停止运算并立即输出比较结果,节省不必要的功耗.新设计的异步比较器和用于对比的同步比较器(BCL比较器和门控时钟比较器)均用SMIC 0.18μm工艺实现.仿真结果表明,提前终止异步比较器功耗最低,与同步BCL比较器和门控时钟比较器相比,在随机数据和来自LDPC解码器的数据下,分别节省了87.1%、84.5%和37.5%、28.6%的功耗.

关键词: 低功耗, 数据统计特性, 比较器, LDPC(低密度奇偶检验)解码器

Abstract: Two types of low-power asynchronous comparators named asynchronous ripple comparator and pre-stop asynchronous comparator are proposed based on the statistical characteristic of input data in the paper.The asynchronous ripple comparator stops computing at the first unequal bit,but it has to deliver the result to the LSB.The pre-stop asynchronous comparator is proposed by revising the truth table based on the new 2-bit comparison unit and stop judgment circuit.It can stop comparing at the first unequal bit and obtain the result immediately.The proposed and contrastive comparators (BCL comparator and clock-gating comparator) are implemented with SMIC 0.18 μm process.Simulation results show that the proposed pre-stop asynchronous comparator features the lowest power.It saves 87.1%,84.5% and 37.5%,28.6% power respectively compared to the synchronous BCL comparator and clock-gating comparator with random data and data from LDPC decoder.

Key words: low-power, statistical characteristics of input data, comparator, LDPC (low density parity check) decoder

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