电子学报 ›› 2015, Vol. 43 ›› Issue (11): 2151-2160.DOI: 10.3969/j.issn.0372-2112.2015.11.003

• 学术论文 • 上一篇    下一篇

一种粗粒度可重构体系结构多目标优化映射算法

陈乃金1,3, 江建慧2   

  1. 1. 安徽工程大学计算机与信息学院, 安徽 芜湖 241000;
    2. 同济大学软件学院, 上海 201804;
    3. 天津大学计算机科学与技术学院, 天津 300072
  • 收稿日期:2015-02-28 修回日期:2015-06-05 出版日期:2015-11-25
  • 作者简介:陈乃金 男,1972年生于安徽合肥,天津大学博士后,安徽工程大学副教授,硕士生导师,主要研究方向为可重构计算、时域划分与映射、VLSI/SoC测试与容错等.E-mail:86naijinchen@tongji.edu.cn;江建慧 男,1964年生于浙江淳安,博士,同济大学教授,博士生导师,主要研究方向为VLSI/SoC测试与容错、可信系统与网络、软件可靠性工程等.E-mail:jhjiang@tongji.edu.cn
  • 基金资助:

    国家863高技术研究发展计划(No.2009AA011705,No.2013AA013204); 国家自然科学基金重点项目(No.61432017); 安徽省自然科学基金(No.1408085MF124); 芜湖市科技计划自然科学基金(No.芜科计字[2012]94号); 安徽工程大学国家自然科学预研基金; 安徽省高校省级自然科学基金重点项目(No.Kj2015A003)

A Multi-Objective Optimization Mapping Algorithm for Coarse Grained Reconfigurable Architectures

CHEN Nai-jin1,3, JIANG Jian-hui2   

  1. 1. College of Computer and Information Science, Anhui Polytechnic University, Wuhu, Anhui 241000, China;
    2. School of Software Engineering, Tongji University, Shanghai 201804, China;
    3. School of Computer Science and Technology, Tianjin University, Tianjin 300072, China
  • Received:2015-02-28 Revised:2015-06-05 Online:2015-11-25 Published:2015-11-25

摘要:

针对多约束下的行流水粗粒度可重构体系结构的硬件任务划分映射问题,提出了一种多目标优化映射算法.该算法根据运算节点执行时延、依赖度等因素构造了累加概率权值函数,在满足可重构单元面积和互连等约束下,通过该函数值动态调整就绪节点的映射调度次序,当一块可重构单元阵列当前行映射完毕后,就自动换行,当一块阵列被填满,就切换到下一块,当一个数据流图映射完毕后,就自动计算划分块数等参数.实验结果表明,与层贪婪映射算法相比,文中算法平均执行总周期降低了8.4%(RCA4×4)和5.3%(RCA6×6),与分裂压缩内核映射算法相比,文中算法平均执行总周期降低了20.6%(RCA4×4)和21.0%(RCA6×6),从而验证了文中提出算法的有效性.

关键词: 可重构单元阵列, 时域映射, 累加概率权值, 异步计算时延, 资源约束

Abstract:

Based on row pipelining coarse grained reconfigurable architecture(CGRA),we presented MOM(multi-objective optimization mapping) algorithm to solve the multi-constraints hardware task partitioning-mapping problem.The cumulative probability weight function was constructed by the execution delay of computing nodes and the dependence between two nodes,etc.With the constraints of reconfigurable cell area and interconnection,the proposed algorithm could adjust dynamically the scheduling order of the ready nodes by thefunction values.When a row of the RCA was mapped completely,MOM began on a new row.When the RCA was filled,MOM switched to the next one.When a DFG(data flow graph) was mapped completely,the number of modules and etc were calculated automatically in MOM.Experiment results show that the average execution total cycles of MOM decrease by 8.4%(RCA4×4) and 5.3%(RCA6×6) comparing with LBGM(level based greedy mapping) algorithm.Comparing with SPKM(split-push kernel mapping) algorithm,the average execution total cycles of MOM decrease by 20.6%(RCA4×4) and 21%(RCA6×6).Experimental evaluation confirms the efficiency of our approach.

Key words: reconfigurable cell array, temporal mapping, accumulation probability weight, asynchronous computation delay, resource constraint

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