新型电容式MEMS加速度计数字接口电路设计

doi:10.3969/j.issn.0372-2112.2016.10.032

电子学报 ›› 2016, Vol. 44 ›› Issue (10): 2507-2513.DOI: 10.3969/j.issn.0372-2112.2016.10.032

新型电容式MEMS加速度计数字接口电路设计

李宗伟^1,2, 丛宁^1,2, 熊兴崟^1,2, 韩可都¹, 杨长春¹

1. 中国科学院地质与地球物理研究所, 北京 100029;
2. 中国科学院大学, 北京 100049

收稿日期:2015-08-19 修回日期:2016-02-18 出版日期:2016-10-25
- 作者简介:
- 李宗伟,男,1987年2月出生于山东聊城市.2010年毕业于青岛科技大学,之后进入中国科学院地质与地球物理研究所进行硕博连读,主要从事MEMS传感器系统设计、模数混合电路设计及MEMS接口电路ASIC设计方面的有关研究.E-mail:lizongwei@mail.iggcas.ac.cn;丛宁,女,1987年12月出生,吉林松原人.2010年毕业于东北石油大学电子与信息技术专业,2010年进入中国科学院地质与地球物理研究所,现为硕博连读生,从事数模混合电路设计方面的有关研究.E-mail:congning@mail.iggcas.ac.cn
- 基金资助:
- 国家重大科研装备研制 (No.ZDYZ2012-1-06-04）; 国家科技重大专项 (No.2011ZX05008-005）

A New Type Capacitive MEMS Accelerometer Digital Interface Circuit Design

LI Zong-wei^1,2, CONG Ning^1,2, XIONG Xing-yin^1,2, HAN Ke-du¹, YANG Chang-chun¹

1. Institute of Geology and Geophysics, Chinese Academy of Sciences, Beijing 100029, China;
2. University of Chinese Academy of Sciences, Beijing 100049, China

Received:2015-08-19 Revised:2016-02-18 Online:2016-10-25 Published:2016-10-25
- Supported by:
- National Major Research Equipment Development project (No.ZDYZ2012-1-06-04); National Science and Technology Major Project of the Ministry of Science and Technology (No.2011ZX05008-005)

摘要/Abstract

摘要：

MEMS加速度计接口电路主要采用传统sigma-delta架构实现，但这种方式中的电路失调电压很容易产生积分饱和现象.为解决这个问题，本文设计了一种可以用于钻井、石油勘探等微弱信号检测的新型数字电容接口电路.该设计在电容式MEMS加速度传感器基础上，采用FPGA实现数字三阶环路滤波器，构成5阶sigma-delta系统.采用数字环路滤波器降低了ASIC模拟电路版图设计与芯片测试难度，利于快速优化环路滤波器设计参数，改善系统稳定性和优化系统噪声性能.前置放大器采用一种相对简单的相关双采样技术，能够有效减小前置放大器的失调电压.根据MEMS加速度计前置放大器输出信号符合正态分布的特点，设计了带有一定预测功能的8-bit瞬时浮点ADC，实现模拟与数字环路滤波器互联.在200Hz带宽内，该接口电路系统噪声基底达到53.09ng/rt（Hz），满足系统噪声设计要求.前置放大器与ADC采用XFAB XH018混合信号CMOS工艺流片，开环测试表明，前置放大器的灵敏度和噪声分别为0.69V/pF和3.20μV/rt（Hz）.

关键词: 接口电路, MEMS, sigma-delta, ADC

Abstract:

The circuit offset often causes integration saturation in the traditional sigma-delta interface of capacitive MEMS accelerometers.To address this problem,a new type of capacitive digital interface circuit used for downhole exploration and oil detection is designed.This paper presents a MEMS-based 5th-order sigma-delta capacitive accelerometer,where the 3rd-order digital loop filter is realized using FPGA.This will reduce the ASIC analog circuit layout design and chip testing difficulties and is easy to optimize the loop filter parameters,which can be used to improve the system stability and optimize the noise performance.The analog-frond-end amplifier (AFE) is realized by using a simple correlated double sampling (CDS),which is one effective method to reduce circuit offset of AFE.According to the Gaussian distribution of AFE output signal,one new type 8-bit instantaneous floating point ADC (IFP ADC) is designed.The IFP ADC is used to convert analog signal of AFE to digital signal to feed the 3rd-order digital loop filter.The whole system provides a significantly low noise floor 53.09ng/rt(Hz) overall a 200 Hz bandwidth.In this work,the AFE amplifier and ADC were successfully fabricated by using XFAB XH018 mixed-signal CMOS process.Furthermore,the sensitivity and noise floor of the AFE amplifier are 0.69V/pF and 3.20 μV/rt(Hz) in open loop measurement,respectively.

Key words: interface circuit, MEMS, sigma-delta, ADC

中图分类号:

TN432
TP212

李宗伟, 丛宁, 熊兴崟, 等. 新型电容式MEMS加速度计数字接口电路设计[J]. 电子学报, 2016, 44(10): 2507-2513.

LI Zong-wei, CONG Ning, XIONG Xing-yin, et al. A New Type Capacitive MEMS Accelerometer Digital Interface Circuit Design[J]. Acta Electronica Sinica, 2016, 44(10): 2507-2513.

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新型电容式MEMS加速度计数字接口电路设计

A New Type Capacitive MEMS Accelerometer Digital Interface Circuit Design

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