电子学报 ›› 2018, Vol. 46 ›› Issue (10): 2486-2494.DOI: 10.3969/j.issn.0372-2112.2018.10.024

• 学术论文 • 上一篇    下一篇

基于周期粒度的级间寄存器备份机制

王晶1,2,3, 申娇1, 丁利华1, 杨星1, 邱柯妮3, 张伟功3   

  1. 1. 首都师范大学信息工程学院, 北京 100048;
    2. 中国科学院计算技术研究所, 计算机体系结构国家重点实验室, 北京 100190;
    3. 首都师范大学电子系统可靠性技术北京市重点实验室, 北京 100048
  • 收稿日期:2017-01-16 修回日期:2017-04-18 出版日期:2018-10-25 发布日期:2018-10-25
  • 通讯作者: 张伟功
  • 作者简介:王晶,女,1982年生于黑龙江哈尔滨,首都师范大学副教授.研究兴趣包括计算机系统结构、容错计算、高能效计算;申娇,女,1991年生于湖北钟祥,硕士研究生,研究方向为计算机体系结构.
  • 基金资助:
    国防973项目;国家自然科学基金(No.61772350,No.61472260,No.61741211);北京市高水平教师队伍建设计划(No.CIT&TCD201704082,No.CIT&TCD20170322);体系结构国家重点实验室开放课题(No.CARCH201607);北京市科技新星计划(No.XX2018081);深圳市科技计划项目(No.JCYJ20150529164656096,No.JCYJ20170302153955969)

Backup Mechanism of Pipeline Register Based on Cycle Granularity

WANG Jing1,2,3, SHEN Jiao1, DING Li-hua1, YANG Xing1, QIU Ke-ni3, ZHANG Wei-gong3   

  1. 1. College of Information Engineering, Capital Normal University, Beijing 100048, China;
    2. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190, China;
    3. Beijing Key Laboratory of Electronic System Reliability and Prognostics, Beijing 100048, China
  • Received:2017-01-16 Revised:2017-04-18 Online:2018-10-25 Published:2018-10-25

摘要: 单粒子翻转是空间环境下微处理器发生异常的重要诱因之一,随着集成电路特征尺寸的缩小,单粒子翻转不仅会引发单位错误,还会引发大量的多位错误,如何有效解决处理器所面临的多位故障是容错处理器设计面临的新挑战.本文提出了一种基于周期粒度的级间寄存器备份机制的容错方法,采用双流水线冗余结构,通过比较器对比两条流水线的级间寄存器以检测单粒子故障;以周期粒度对级间寄存器的内容进行备份,当检测到单粒子故障时,使用2个周期对流水线进行恢复;为避免脏数据流出流水线,在数据缓存和寄存器堆的入口设置写缓冲,通过延迟写入保证信息可靠性.本文基于实际的SPARC V8结构处理器,对提出的方法进行了具体实现,在实验平台上进行了仿真,仿真结果显示,本文提出的容错方法能够以一定的面积开销实现对SEU、SET、和MBU故障容错,加固处理器的主频最高可以提升70%.

关键词: 单粒子翻转, 多位故障, 容错, 备份, 写缓冲, 流水线加固

Abstract: SEU is one of the important causes for the microprocessor in which the exception occurs in space environment.SEU not only causes single-bit error,but does lead to a number of multi-bit errors,along with the reduction of the IC feature size.It is a great challenge that we find a way to effectively cope with the multi-bit error.This paper proposes a fault-tolerant method which backs up the pipeline registers based on cycle granularity,the dual modular redundancy is applied in this method.The pipeline registers on the two pipelines are compared through the comparators to detect the error and the pipeline registers are backed up based on cycle granularity.It takes two cycles to restore the error pipeline when the error is detected.The write buffer is set in the entrance to the data cache and register file to avoid dirty data flowing out of the pipeline.And we can ensure the data is correct through delay write.This paper implements the fault-tolerant method based on SPARC V8 processor and tests in the simulation environment.The simulation results shows that the CPU clock speed of the hardened processor in which the proposed fault-tolerant method is applied can increase 70% at most and the fault-tolerance of the SEU,SET and MBU is implemented with the limited area overhead.

Key words: SEU, MBU, fault tolerance, back-up, write-buffer, pipeline hardened

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