基于一种NAND闪存页缓存器设计的C/F读取算法研究

doi:10.3969/j.issn.0372-2112.2018.11.008

电子学报 ›› 2018, Vol. 46 ›› Issue (11): 2619-2625.DOI: 10.3969/j.issn.0372-2112.2018.11.008

基于一种NAND闪存页缓存器设计的C/F读取算法研究

陈珂^1,2, 杜智超^2,3, 叶松¹, 王颀^2,3, 霍宗亮^2,3

1. 成都信息工程大学通信工程学院, 四川成都 610225;
2. 中国科学院微电子研究所, 北京 100029;
3. 中国科学院大学微电子学院, 北京 100029

收稿日期:2017-11-27 修回日期:2018-03-22 出版日期:2018-11-25
- 作者简介:
- 陈珂女,1992年7月出生于山东潍坊,成都信息工程大学硕士研究生,现主要研究方向为NAND存储器页缓存器电路.E-mail:ck920725@hotmail.com;杜智超 女,1988年2月出生于宁夏石嘴山,中科院微电子所博士研究生,现主要研究方向为NAND存储器件与集成技术.E-mail:duzhichao@ime.ac.cn;霍宗亮 男,1975年出生于陕西,中科院微电子所研究员,博士生导师,现研究方向为新型纳米存储器件与集成技术.E-mail:huozongliang@ime.ac.cn
- 基金资助:
- 国家自然科学基金 (No.61474137）; 国家自然科学基金 (No.61404168）

Research on Coarse/Fine Read Algorithm Based on a NAND Flash Page Buffer Design

CHEN Ke^1,2, DU Zhi-chao^2,3, YE Song¹, WANG Qi^2,3, HUO Zong-liang^2,3

1.College of Communication Engineering, Chengdu University of Information Technology, Sichuan, chengdu 610225, China;
2.Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China;
3.School of Microelectronics, University of Chinese Academy of Sciences, Beijing 100029, China

Received:2017-11-27 Revised:2018-03-22 Online:2018-11-25 Published:2018-11-25
- Supported by:
- National Natural Science Foundation of China (No.61474137); National Natural Science Foundation of China (No.61404168)

摘要/Abstract

摘要： 为减小共源线噪声对NAND闪存读可靠性的影响，设计了一种可实现C/F（Coarse/Fine）读取操作的页缓存器电路，并设计实现了适用于此电路的C/F读取算法，显著减小了共源线噪声.该算法通过两次子读感应读取存储单元，在第一次子读感应中分辨出阈值电压较低的存储单元并标记在页缓存器中，使其不再进行第二次子读感应，从而减小共源线噪声引起的阈值偏移.电路仿真计算表明，该支持C/F读取算法的页缓存器结构能够减小阈值偏移至少495.6mV，有效提高了NAND闪存读操作的精确性.

关键词: NAND闪存, 多值存储单元, 页缓存器, Coarse/Fine读取算法, 读可靠度

Abstract: To reduce the effect of the common source line noise in read operation of NAND Flash Memory, a page buffer circuit which can realize the coarse/fine read operation is proposed and a C/F read algorithm suitable for the page buffer circuit is introduced and implemented which can reduce the common source line noise significantly. There are two sub-read operations in the algorithm, the purpose of the first sub-read operation is to distinguish the cells with lower threshold voltage and mark them in page buffer circuit. These cells are no longer sensed in the second sub-read operation. As a result, the threshold voltage shift caused by the common source line noise is suppressed. The circuit simulation results show that the page buffer structure which supports the C/F read algorithm can reduce the shift of the threshold distribution more than 495.6mV and the read accuracy of NAND Flash Memory is greatly improved.

Key words: NAND flash memory, multi-level cell, page buffer, coarse/fine read algorithm, read reliability

中图分类号:

TP333.5+2

陈珂, 杜智超, 叶松, 等. 基于一种NAND闪存页缓存器设计的C/F读取算法研究[J]. 电子学报, 2018, 46(11): 2619-2625.

CHEN Ke, DU Zhi-chao, YE Song, et al. Research on Coarse/Fine Read Algorithm Based on a NAND Flash Page Buffer Design[J]. Acta Electronica Sinica, 2018, 46(11): 2619-2625.

基于一种NAND闪存页缓存器设计的C/F读取算法研究

Research on Coarse/Fine Read Algorithm Based on a NAND Flash Page Buffer Design

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