基于新型非易失存储器的混合内存架构的内存管理机制

doi:10.3969/j.issn.0372-2112.2019.03.021

电子学报 ›› 2019, Vol. 47 ›› Issue (3): 664-670.DOI: 10.3969/j.issn.0372-2112.2019.03.021

基于新型非易失存储器的混合内存架构的内存管理机制

李琪^1,2, 钟将², 李雪³, 李青²

1. 淮阴师范学院计算机科学技术学院, 江苏淮阴 223300;
2. 重庆大学计算机学院, 重庆 400044;
3. 昆士兰大学信息技术与电子工程学院, 昆士兰州布里斯班 4072

收稿日期:2017-07-27 修回日期:2018-08-24 出版日期:2019-03-25 发布日期:2019-03-25
作者简介:李琪男,1987年生于江苏淮安.重庆大学计算机学院博士.主要研究方向为复杂网络、图计算、并行计算.E-mail:liqi0713@foxmail.com;钟将男,1974年生于重庆市.重庆大学计算机学院教授.主要研究方向为大数据分析与挖掘、自然语言处理、云网融合、网络安全等.E-mail:zhongjiang@cqu.edu.cn
基金资助:
国家重点研发计划（No.2017YFB1402400）；重庆市社会事业与民生保障科技创新专项（No.cstc2017shmsA0641）；国家863计划项目（No.2015AA015308）；重庆市重点产业共性关键技术创新专项（No.cstc2017zdcy-zdyxx0047）；重庆市技术创新与应用示范（产业类重点研发）项目（No.cstc2018jszx-cyzdX0086）；中央高校项目（No.2018CDYJSY0055）

Memory Management Mechanism for Hybrid Memory Architecture Based on New Non-volatile Memory

LI Qi^1,2, ZHONG Jiang², LI Xue³, LI Qing²

1. School of Computer Science and Technology, Huaiyin Normal University, Huaiyin, Jiangsu 223300, China;
2. College of Computer Science, Chongqing University, Chongqing 400044, China;
3. School of Information Technology and Electrical Engineering, University of Queensland, Brisbane 4072, Australia

Received:2017-07-27 Revised:2018-08-24 Online:2019-03-25 Published:2019-03-25

摘要/Abstract

摘要： 随着互联网和云计算技术的迅猛发展，现有动态随机存储器（Dynamic Random Access Memory，DRAM）已无法满足一些实时系统对性能、能耗的需求.新型非易失存储器（Non-Volatile Memory，NVM）的出现为计算机存储体系的发展带来了新的契机.本文针对NVM和DRAM混合内存系统架构，提出一种高效的混合内存页面管理机制.该机制针对内存介质写特性的不同，将具有不同访问特征的数据页保存在合适的内存空间中，以减少系统的迁移操作次数，从而提升系统性能.同时该机制使用一种两路链表使得NVM介质的写操作分布更加均匀，以提升使用寿命.最后，本文在Linux内核中对所提机制进行仿真实验.并与现有内存管理机制进行对比，实验结果证明了所提方法的有效性.

关键词: 非易失存储器, 磨损均衡, 内存计算, 混合内存

Abstract: With the rapid development of internet and cloud computing technology,the existing dynamic random access memory (DRAM) have been unable to meet the requirements of performance and energy consumption of some real time systems.The emergence of non-volatile memory (NVM) have shown great potential for the development of the computer storage architecture.This paper proposes a kind of efficient memory page management mechanism based on the hybrid NVM and DRAM memory architecture.The main idea of this mechanism is to save the data pages with different access characteristics in the appropriate memory space according to the characteristics of different memory media,to reduce the number of system migration operations and improve the system performance.At the same time,the mechanism uses an efficient wear-leveling algorithm to improve NVM's lifetime.Finally,the experimental results show that the proposed method is effective.

Key words: non-volatile memory, wear leveling, memory computing, hybrid memory

中图分类号:

TP333

李琪, 钟将, 李雪, 李青. 基于新型非易失存储器的混合内存架构的内存管理机制[J]. 电子学报, 2019, 47(3): 664-670.

LI Qi, ZHONG Jiang, LI Xue, LI Qing. Memory Management Mechanism for Hybrid Memory Architecture Based on New Non-volatile Memory[J]. Acta Electronica Sinica, 2019, 47(3): 664-670.

参考文献

[1] 冒伟,刘景宁,童薇,等.基于相变存储器的存储技术研究综述[J].计算机学报,2015,38(5):944-960.Wei M,Liu J N,Wei T,et al.A review of storage technology research based on phase change memory[J].Chinese Journal of Computers,2015,38(5):944-960.(in Chinese)
[2] Li T,John L K.Run-time modeling and estimation of operating system power consumption[A].2003 ACMSIGMETRICS International Conference on Measurement and Modeling of Computer Systems[C].San Diego,California,USA:ACM,2003.160-171.
[3] Zhang J,Liao X,Jin H,et al.Anoptimal page-level power management strategy in PCM-DRAM hybrid memory[J].International Journal of Parallel Programming,2017,45(1):4-16.
[4] Burr G W,Breitwisch M J,Franceschini M,et al.Phase change memory technology[J].Journal of Vacuum Science& Technology B Microelectronics& Nanometer Structures,2010,28(2):223-262.
[5] Zhang H,Chen G,Ooi B C,et al.In-memory big data management and processing:a survey[J].IEEE Transactions on Knowledge& Data Engineering,2015,27(7):1920-1948.
[6] Zhong K,Liu D,Liang L,et al.Energy-efficient in-memory paging for smartphones[J].IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2016,35(10):1577-1590.
[7] Li M,Zhang H J,Wu Y J,et al.MemSC:a scan-resistant and compact cache replacement framework for memory-based key-value cache systems[J].Journal of Computer Science and Technology,2017,32(1):55-67.
[8] Jiang L,Du Y,Zhang Y,et al.LLS:Cooperative integration of wear-leveling and salvaging for PCM mainmemory[A].DSN'11 Proceedings of the 2011 IEEE/IFIP 41st International Conference on Dependable Systems & Networks[C].Washington,DC,USA,IEEE,2011.221-232.
[9] Guthaus M R,Ringenberg J S,Ernst D,et al.MiBench:A free,commercially representative embedded benchmark suite[A].WWC'01 Proceedings of the Workload Characterization,2001.WWC-4.2001 IEEE International Workshop[C].Washington,DC,USA,IEEE,2001.3-14.
[10] Chen C H,Hsiu P C,Kuo T W,et al.Age-based PCM wear leveling with nearly zero search cost[A].DAC'12 Proceedings of the 49th Annual Design Automation Conference[C].San Francisco,California,IEEE,2012.453-458.
[11] 倪亚路,周晓方.一种基于伪LRU的新型共享Cache划分机制[J].电子学报,2013,41(4):681-684.NI Ya-lu,ZHOU Xiao-fang.A novel pseudo-LRU based shared cache partitioning mechanism[J].Acta Electronica Sinica,2013,41(4):681-684.(in Chinese)
[12] Lee M,Dong H K,Kim J,et al.M-CLOCK:migration-optimized page replacement algorithm for hybrid DRAM and PCM memory architecture[A].SAC'15 Proceedings of the 30th Annual ACM Symposium on Applied Computing[C].Salamanca,Spain:ACM,2015.2001-2006.
[13] Lee S,Bahn H,Noh S H.CLOCK-DWF:a write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures[J].IEEE Transactions on Computers,2014,63(9):2187-2200.
[14] Tian W,Li J,Zhao Y,et al.Optimal task allocation on non-volatile memory based hybrid main memory[J].IEEE Transactions on Very Large Scale Integration Systems,2013,21(7):1271-1284.

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基于新型非易失存储器的混合内存架构的内存管理机制

Memory Management Mechanism for Hybrid Memory Architecture Based on New Non-volatile Memory

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